Discussion:
[PATCH 1/3] amd/common/radv/radeonsi: use register defines for dcc block sizes.
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Dave Airlie
2017-12-26 22:19:01 UTC
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From: Dave Airlie <***@redhat.com>

These are just taken from amdvlk, we probably knew these already,
but may as well port them now.

Signed-off-by: Dave Airlie <***@redhat.com>
---
src/amd/common/sid.h | 6 ++++++
src/amd/vulkan/radv_device.c | 6 +++---
src/gallium/drivers/radeonsi/si_state.c | 6 +++---
3 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/src/amd/common/sid.h b/src/amd/common/sid.h
index 59a7e2a06e..3588d39d62 100644
--- a/src/amd/common/sid.h
+++ b/src/amd/common/sid.h
@@ -8954,9 +8954,15 @@
#define S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x03) << 2)
#define G_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((x) >> 2) & 0x03)
#define C_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE 0xFFFFFFF3
+#define V_028C78_MAX_BLOCK_SIZE_64B 0
+#define V_028C78_MAX_BLOCK_SIZE_128B 1
+#define V_028C78_MAX_BLOCK_SIZE_256B 2
+
#define S_028C78_MIN_COMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x1) << 4)
#define G_028C78_MIN_COMPRESSED_BLOCK_SIZE(x) (((x) >> 4) & 0x1)
#define C_028C78_MIN_COMPRESSED_BLOCK_SIZE 0xFFFFFFEF
+#define V_028C78_MIN_BLOCK_SIZE_32B 0
+#define V_028C78_MIN_BLOCK_SIZE_64B 1
#define S_028C78_MAX_COMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x03) << 5)
#define G_028C78_MAX_COMPRESSED_BLOCK_SIZE(x) (((x) >> 5) & 0x03)
#define C_028C78_MAX_COMPRESSED_BLOCK_SIZE 0xFFFFFF9F
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 9ea2b92013..63be8c53a9 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -3161,12 +3161,12 @@ radv_initialise_color_surface(struct radv_device *device,
cb->cb_color_info |= S_028C70_DCC_ENABLE(1);

if (device->physical_device->rad_info.chip_class >= VI) {
- unsigned max_uncompressed_block_size = 2;
+ unsigned max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_256B;
if (iview->image->info.samples > 1) {
if (iview->image->surface.bpe == 1)
- max_uncompressed_block_size = 0;
+ max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B;
else if (iview->image->surface.bpe == 2)
- max_uncompressed_block_size = 1;
+ max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_128B;
}

cb->cb_dcc_control = S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(max_uncompressed_block_size) |
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 5c4c38368f..544bf6aa2f 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2450,13 +2450,13 @@ static void si_initialize_color_surface(struct si_context *sctx,
}

if (sctx->b.chip_class >= VI) {
- unsigned max_uncompressed_block_size = 2;
+ unsigned max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_256B;

if (rtex->resource.b.b.nr_samples > 1) {
if (rtex->surface.bpe == 1)
- max_uncompressed_block_size = 0;
+ max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B;
else if (rtex->surface.bpe == 2)
- max_uncompressed_block_size = 1;
+ max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_128B;
}

surf->cb_dcc_control = S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(max_uncompressed_block_size) |
--
2.14.3
Dave Airlie
2017-12-26 22:19:02 UTC
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Raw Message
From: Dave Airlie <***@redhat.com>

This is ported from amdvlk.

Signed-off-by: Dave Airlie <***@redhat.com>
---
src/amd/vulkan/radv_device.c | 10 ++++++++++
src/gallium/drivers/radeonsi/si_state.c | 9 +++++++++
2 files changed, 19 insertions(+)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 63be8c53a9..c87d858a17 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -3162,6 +3162,15 @@ radv_initialise_color_surface(struct radv_device *device,

if (device->physical_device->rad_info.chip_class >= VI) {
unsigned max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_256B;
+ unsigned min_compressed_block_size = V_028C78_MIN_BLOCK_SIZE_32B;
+
+ /* amdvlk: [min-compressed-block-size] should be set to 32 for dGPU and
+ 64 for APU because all of our APUs to date use DIMMs which have
+ a request granularity size of 64B while all other chips have a
+ 32B request size */
+ if (!device->physical_device->rad_info.has_dedicated_vram)
+ min_compressed_block_size = V_028C78_MIN_BLOCK_SIZE_64B;
+
if (iview->image->info.samples > 1) {
if (iview->image->surface.bpe == 1)
max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B;
@@ -3170,6 +3179,7 @@ radv_initialise_color_surface(struct radv_device *device,
}

cb->cb_dcc_control = S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(max_uncompressed_block_size) |
+ S_028C78_MIN_COMPRESSED_BLOCK_SIZE(min_compressed_block_size) |
S_028C78_INDEPENDENT_64B_BLOCKS(1);
}

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 544bf6aa2f..db31fae60f 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2451,6 +2451,14 @@ static void si_initialize_color_surface(struct si_context *sctx,

if (sctx->b.chip_class >= VI) {
unsigned max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_256B;
+ unsigned min_compressed_block_size = V_028C78_MIN_BLOCK_SIZE_32B;
+
+ /* amdvlk: [min-compressed-block-size] should be set to 32 for dGPU and
+ 64 for APU because all of our APUs to date use DIMMs which have
+ a request granularity size of 64B while all other chips have a
+ 32B request size */
+ if (!sctx->screen->info.has_dedicated_vram)
+ min_compressed_block_size = V_028C78_MIN_BLOCK_SIZE_64B;

if (rtex->resource.b.b.nr_samples > 1) {
if (rtex->surface.bpe == 1)
@@ -2460,6 +2468,7 @@ static void si_initialize_color_surface(struct si_context *sctx,
}

surf->cb_dcc_control = S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(max_uncompressed_block_size) |
+ S_028C78_MIN_COMPRESSED_BLOCK_SIZE(min_compressed_block_size) |
S_028C78_INDEPENDENT_64B_BLOCKS(1);
}
--
2.14.3
Marek Olšák
2017-12-28 15:07:53 UTC
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Reviewed-by: Marek Olšák <***@amd.com>

Marek
Post by Dave Airlie
This is ported from amdvlk.
---
src/amd/vulkan/radv_device.c | 10 ++++++++++
src/gallium/drivers/radeonsi/si_state.c | 9 +++++++++
2 files changed, 19 insertions(+)
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 63be8c53a9..c87d858a17 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -3162,6 +3162,15 @@ radv_initialise_color_surface(struct radv_device *device,
if (device->physical_device->rad_info.chip_class >= VI) {
unsigned max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_256B;
+ unsigned min_compressed_block_size = V_028C78_MIN_BLOCK_SIZE_32B;
+
+ /* amdvlk: [min-compressed-block-size] should be set to 32 for dGPU and
+ 64 for APU because all of our APUs to date use DIMMs which have
+ a request granularity size of 64B while all other chips have a
+ 32B request size */
+ if (!device->physical_device->rad_info.has_dedicated_vram)
+ min_compressed_block_size = V_028C78_MIN_BLOCK_SIZE_64B;
+
if (iview->image->info.samples > 1) {
if (iview->image->surface.bpe == 1)
max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B;
@@ -3170,6 +3179,7 @@ radv_initialise_color_surface(struct radv_device *device,
}
cb->cb_dcc_control = S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(max_uncompressed_block_size) |
+ S_028C78_MIN_COMPRESSED_BLOCK_SIZE(min_compressed_block_size) |
S_028C78_INDEPENDENT_64B_BLOCKS(1);
}
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 544bf6aa2f..db31fae60f 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2451,6 +2451,14 @@ static void si_initialize_color_surface(struct si_context *sctx,
if (sctx->b.chip_class >= VI) {
unsigned max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_256B;
+ unsigned min_compressed_block_size = V_028C78_MIN_BLOCK_SIZE_32B;
+
+ /* amdvlk: [min-compressed-block-size] should be set to 32 for dGPU and
+ 64 for APU because all of our APUs to date use DIMMs which have
+ a request granularity size of 64B while all other chips have a
+ 32B request size */
+ if (!sctx->screen->info.has_dedicated_vram)
+ min_compressed_block_size = V_028C78_MIN_BLOCK_SIZE_64B;
if (rtex->resource.b.b.nr_samples > 1) {
if (rtex->surface.bpe == 1)
@@ -2460,6 +2468,7 @@ static void si_initialize_color_surface(struct si_context *sctx,
}
surf->cb_dcc_control = S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(max_uncompressed_block_size) |
+ S_028C78_MIN_COMPRESSED_BLOCK_SIZE(min_compressed_block_size) |
S_028C78_INDEPENDENT_64B_BLOCKS(1);
}
--
2.14.3
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Dave Airlie
2017-12-26 22:19:03 UTC
Permalink
Raw Message
From: Dave Airlie <***@redhat.com>

This is ported from amdvlk which sets the independent 64b blocks
only for image which will sample dcc.

I'm not sure how to port this to radeonsi.

Signed-off-by: Dave Airlie <***@redhat.com>
---
src/amd/vulkan/radv_device.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index c87d858a17..0d1494daf3 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -3163,6 +3163,8 @@ radv_initialise_color_surface(struct radv_device *device,
if (device->physical_device->rad_info.chip_class >= VI) {
unsigned max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_256B;
unsigned min_compressed_block_size = V_028C78_MIN_BLOCK_SIZE_32B;
+ unsigned independent_64b_blocks = 0;
+ unsigned max_compressed_block_size;

/* amdvlk: [min-compressed-block-size] should be set to 32 for dGPU and
64 for APU because all of our APUs to date use DIMMs which have
@@ -3178,9 +3180,16 @@ radv_initialise_color_surface(struct radv_device *device,
max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_128B;
}

+ if (iview->image->usage & (VK_IMAGE_USAGE_SAMPLED_BIT | VK_IMAGE_USAGE_TRANSFER_SRC_BIT)) {
+ independent_64b_blocks = 1;
+ max_compressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B;
+ } else
+ max_compressed_block_size = max_uncompressed_block_size;
+
cb->cb_dcc_control = S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(max_uncompressed_block_size) |
+ S_028C78_MAX_COMPRESSED_BLOCK_SIZE(max_compressed_block_size) |
S_028C78_MIN_COMPRESSED_BLOCK_SIZE(min_compressed_block_size) |
- S_028C78_INDEPENDENT_64B_BLOCKS(1);
+ S_028C78_INDEPENDENT_64B_BLOCKS(independent_64b_blocks);
}

/* This must be set for fast clear to work without FMASK. */
--
2.14.3
Bas Nieuwenhuizen
2017-12-27 00:58:17 UTC
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Raw Message
Reviewed-by: Bas Nieuwenhuizen <***@basnieuwenhuizen.nl>

for this series.
Post by Dave Airlie
These are just taken from amdvlk, we probably knew these already,
but may as well port them now.
---
src/amd/common/sid.h | 6 ++++++
src/amd/vulkan/radv_device.c | 6 +++---
src/gallium/drivers/radeonsi/si_state.c | 6 +++---
3 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/src/amd/common/sid.h b/src/amd/common/sid.h
index 59a7e2a06e..3588d39d62 100644
--- a/src/amd/common/sid.h
+++ b/src/amd/common/sid.h
@@ -8954,9 +8954,15 @@
#define S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x03) << 2)
#define G_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((x) >> 2) & 0x03)
#define C_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE 0xFFFFFFF3
+#define V_028C78_MAX_BLOCK_SIZE_64B 0
+#define V_028C78_MAX_BLOCK_SIZE_128B 1
+#define V_028C78_MAX_BLOCK_SIZE_256B 2
+
#define S_028C78_MIN_COMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x1) << 4)
#define G_028C78_MIN_COMPRESSED_BLOCK_SIZE(x) (((x) >> 4) & 0x1)
#define C_028C78_MIN_COMPRESSED_BLOCK_SIZE 0xFFFFFFEF
+#define V_028C78_MIN_BLOCK_SIZE_32B 0
+#define V_028C78_MIN_BLOCK_SIZE_64B 1
#define S_028C78_MAX_COMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x03) << 5)
#define G_028C78_MAX_COMPRESSED_BLOCK_SIZE(x) (((x) >> 5) & 0x03)
#define C_028C78_MAX_COMPRESSED_BLOCK_SIZE 0xFFFFFF9F
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 9ea2b92013..63be8c53a9 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -3161,12 +3161,12 @@ radv_initialise_color_surface(struct radv_device *device,
cb->cb_color_info |= S_028C70_DCC_ENABLE(1);
if (device->physical_device->rad_info.chip_class >= VI) {
- unsigned max_uncompressed_block_size = 2;
+ unsigned max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_256B;
if (iview->image->info.samples > 1) {
if (iview->image->surface.bpe == 1)
- max_uncompressed_block_size = 0;
+ max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B;
else if (iview->image->surface.bpe == 2)
- max_uncompressed_block_size = 1;
+ max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_128B;
}
cb->cb_dcc_control = S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(max_uncompressed_block_size) |
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 5c4c38368f..544bf6aa2f 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2450,13 +2450,13 @@ static void si_initialize_color_surface(struct si_context *sctx,
}
if (sctx->b.chip_class >= VI) {
- unsigned max_uncompressed_block_size = 2;
+ unsigned max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_256B;
if (rtex->resource.b.b.nr_samples > 1) {
if (rtex->surface.bpe == 1)
- max_uncompressed_block_size = 0;
+ max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B;
else if (rtex->surface.bpe == 2)
- max_uncompressed_block_size = 1;
+ max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_128B;
}
surf->cb_dcc_control = S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(max_uncompressed_block_size) |
--
2.14.3
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