Discussion:
[PATCH 10/13] i915: Remove unused field intel_mipmap_tree::array_spacing_lod0
(too old to reply)
Ian Romanick
2017-06-19 02:07:49 UTC
Permalink
Raw Message
From: Ian Romanick <***@intel.com>

Signed-off-by: Ian Romanick <***@intel.com>
---
src/mesa/drivers/dri/i915/intel_mipmap_tree.h | 9 ---------
1 file changed, 9 deletions(-)

diff --git a/src/mesa/drivers/dri/i915/intel_mipmap_tree.h b/src/mesa/drivers/dri/i915/intel_mipmap_tree.h
index 9294931..afe27e3 100644
--- a/src/mesa/drivers/dri/i915/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i915/intel_mipmap_tree.h
@@ -176,15 +176,6 @@ struct intel_mipmap_tree
*/
uint32_t logical_width0, logical_height0, logical_depth0;

- /**
- * For 1D array, 2D array, cube, and 2D multisampled surfaces on Gen7: true
- * if the surface only contains LOD 0, and hence no space is for LOD's
- * other than 0 in between array slices.
- *
- * Corresponds to the surface_array_spacing bit in gen7_surface_state.
- */
- bool array_spacing_lod0;
-
/* Derived from the above:
*/
GLuint total_width;
--
2.9.4
Ian Romanick
2017-06-19 02:07:43 UTC
Permalink
Raw Message
From: Ian Romanick <***@intel.com>

text data bss dec hex filename
7155246 256860 37332 7449438 71ab5e 32-bit i965_dri.so before
7155058 256860 37332 7449250 71aaa2 32-bit i965_dri.so after
6788683 328056 50704 7167443 6d5dd3 64-bit i965_dri.so before
6788611 328056 50704 7167371 6d5d8b 64-bit i965_dri.so after

Signed-off-by: Ian Romanick <***@intel.com>
---
src/mesa/drivers/common/meta.c | 47 ++++++++++++++++--------------------------
src/mesa/drivers/common/meta.h | 1 -
2 files changed, 18 insertions(+), 30 deletions(-)

diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index 9c1a4f2..85e766a 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -655,31 +655,31 @@ _mesa_meta_begin(struct gl_context *ctx, GLbitfield state)
}

if (state & MESA_META_TRANSFORM) {
- GLuint activeTexture = ctx->Texture.CurrentUnit;
memcpy(save->ModelviewMatrix, ctx->ModelviewMatrixStack.Top->m,
16 * sizeof(GLfloat));
memcpy(save->ProjectionMatrix, ctx->ProjectionMatrixStack.Top->m,
16 * sizeof(GLfloat));
memcpy(save->TextureMatrix, ctx->TextureMatrixStack[0].Top->m,
16 * sizeof(GLfloat));
- save->MatrixMode = ctx->Transform.MatrixMode;
+
/* set 1:1 vertex:pixel coordinate transform */
- _mesa_ActiveTexture(GL_TEXTURE0);
- _mesa_MatrixMode(GL_TEXTURE);
- _mesa_LoadIdentity();
- _mesa_ActiveTexture(GL_TEXTURE0 + activeTexture);
- _mesa_MatrixMode(GL_MODELVIEW);
- _mesa_LoadIdentity();
- _mesa_MatrixMode(GL_PROJECTION);
- _mesa_LoadIdentity();
+ _mesa_load_identity_matrix(ctx, &ctx->ModelviewMatrixStack);
+ _mesa_load_identity_matrix(ctx, &ctx->ProjectionMatrixStack);
+ _mesa_load_identity_matrix(ctx, &ctx->TextureMatrixStack[0]);

/* glOrtho with width = 0 or height = 0 generates GL_INVALID_VALUE.
* This can occur when there is no draw buffer.
*/
- if (ctx->DrawBuffer->Width != 0 && ctx->DrawBuffer->Height != 0)
- _mesa_Ortho(0.0, ctx->DrawBuffer->Width,
- 0.0, ctx->DrawBuffer->Height,
- -1.0, 1.0);
+ if (ctx->DrawBuffer->Width != 0 && ctx->DrawBuffer->Height != 0) {
+ /* Don't FLUSH_VERTICES here because _mesa_load_identity_matrix will
+ * have already done it.
+ */
+ _math_matrix_ortho(ctx->ProjectionMatrixStack.Top,
+ 0.0f, (GLfloat) ctx->DrawBuffer->Width,
+ 0.0f, (GLfloat) ctx->DrawBuffer->Height,
+ -1.0f, 1.0f);
+ ctx->NewState |= ctx->ProjectionMatrixStack.DirtyFlag;
+ }

if (ctx->Extensions.ARB_clip_control) {
save->ClipOrigin = ctx->Transform.ClipOrigin;
@@ -1066,19 +1066,9 @@ _mesa_meta_end(struct gl_context *ctx)
}

if (state & MESA_META_TRANSFORM) {
- GLuint activeTexture = ctx->Texture.CurrentUnit;
- _mesa_ActiveTexture(GL_TEXTURE0);
- _mesa_MatrixMode(GL_TEXTURE);
- _mesa_LoadMatrixf(save->TextureMatrix);
- _mesa_ActiveTexture(GL_TEXTURE0 + activeTexture);
-
- _mesa_MatrixMode(GL_MODELVIEW);
- _mesa_LoadMatrixf(save->ModelviewMatrix);
-
- _mesa_MatrixMode(GL_PROJECTION);
- _mesa_LoadMatrixf(save->ProjectionMatrix);
-
- _mesa_MatrixMode(save->MatrixMode);
+ _mesa_load_matrix(ctx, &ctx->ModelviewMatrixStack, save->ModelviewMatrix);
+ _mesa_load_matrix(ctx, &ctx->ProjectionMatrixStack, save->ProjectionMatrix);
+ _mesa_load_matrix(ctx, &ctx->TextureMatrixStack[0], save->TextureMatrix);

if (ctx->Extensions.ARB_clip_control)
_mesa_ClipControl(save->ClipOrigin, save->ClipDepthMode);
@@ -1455,8 +1445,7 @@ _mesa_meta_setup_ff_tnl_for_blit(struct gl_context *ctx,
0);

/* setup projection matrix */
- _mesa_MatrixMode(GL_PROJECTION);
- _mesa_LoadIdentity();
+ _mesa_load_identity_matrix(ctx, &ctx->ProjectionMatrixStack);
}

/**
diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h
index c09cb3e..fa84995 100644
--- a/src/mesa/drivers/common/meta.h
+++ b/src/mesa/drivers/common/meta.h
@@ -133,7 +133,6 @@ struct save_state
struct gl_stencil_attrib Stencil;

/** MESA_META_TRANSFORM */
- GLenum MatrixMode;
GLfloat ModelviewMatrix[16];
GLfloat ProjectionMatrix[16];
GLfloat TextureMatrix[16];
--
2.9.4
Ian Romanick
2017-06-19 02:07:42 UTC
Permalink
Raw Message
From: Ian Romanick <***@intel.com>

These are basically DSA versions of glLoadIdentity() and glLoadMatrix().

text data bss dec hex filename
7155026 256860 37332 7449218 71aa82 32-bit i965_dri.so before
7155246 256860 37332 7449438 71ab5e 32-bit i965_dri.so after
6788499 328056 50704 7167259 6d5d1b 64-bit i965_dri.so before
6788683 328056 50704 7167443 6d5dd3 64-bit i965_dri.so after

Signed-off-by: Ian Romanick <***@intel.com>
---
src/mesa/main/matrix.c | 32 +++++++++++++++++++++++---------
src/mesa/main/matrix.h | 8 ++++++++
2 files changed, 31 insertions(+), 9 deletions(-)

diff --git a/src/mesa/main/matrix.c b/src/mesa/main/matrix.c
index 83f081e..29a047d 100644
--- a/src/mesa/main/matrix.c
+++ b/src/mesa/main/matrix.c
@@ -308,6 +308,16 @@ _mesa_PopMatrix( void )
}


+void
+_mesa_load_identity_matrix(struct gl_context *ctx, struct gl_matrix_stack *s)
+{
+ FLUSH_VERTICES(ctx, 0);
+
+ _math_matrix_set_identity(s->Top);
+ ctx->NewState |= s->DirtyFlag;
+}
+
+
/**
* Replace the current matrix with the identity matrix.
*
@@ -322,16 +332,24 @@ _mesa_LoadIdentity( void )
{
GET_CURRENT_CONTEXT(ctx);

- FLUSH_VERTICES(ctx, 0);
-
if (MESA_VERBOSE & VERBOSE_API)
_mesa_debug(ctx, "glLoadIdentity()\n");

- _math_matrix_set_identity( ctx->CurrentStack->Top );
- ctx->NewState |= ctx->CurrentStack->DirtyFlag;
+ _mesa_load_identity_matrix(ctx, ctx->CurrentStack);
}


+void
+_mesa_load_matrix(struct gl_context *ctx, struct gl_matrix_stack *s,
+ const GLfloat *m)
+{
+ if (memcmp(m, s->Top->m, 16 * sizeof(GLfloat)) != 0) {
+ FLUSH_VERTICES(ctx, 0);
+ _math_matrix_loadf(s->Top, m);
+ ctx->NewState |= s->DirtyFlag;
+ }
+}
+
/**
* Replace the current matrix with a given matrix.
*
@@ -356,11 +374,7 @@ _mesa_LoadMatrixf( const GLfloat *m )
m[2], m[6], m[10], m[14],
m[3], m[7], m[11], m[15]);

- if (memcmp(m, ctx->CurrentStack->Top->m, 16 * sizeof(GLfloat)) != 0) {
- FLUSH_VERTICES(ctx, 0);
- _math_matrix_loadf( ctx->CurrentStack->Top, m );
- ctx->NewState |= ctx->CurrentStack->DirtyFlag;
- }
+ _mesa_load_matrix(ctx, ctx->CurrentStack, m);
}


diff --git a/src/mesa/main/matrix.h b/src/mesa/main/matrix.h
index 8eee67c..33d7767 100644
--- a/src/mesa/main/matrix.h
+++ b/src/mesa/main/matrix.h
@@ -31,6 +31,14 @@
#include "glheader.h"

struct gl_context;
+struct gl_matrix_stack;
+
+extern void
+_mesa_load_identity_matrix(struct gl_context *ctx, struct gl_matrix_stack *s);
+
+extern void
+_mesa_load_matrix(struct gl_context *ctx, struct gl_matrix_stack *s,
+ const GLfloat *m);

extern void GLAPIENTRY
_mesa_Frustum( GLdouble left, GLdouble right,
--
2.9.4
Ian Romanick
2017-06-19 02:07:44 UTC
Permalink
Raw Message
From: Ian Romanick <***@intel.com>

text data bss dec hex filename
7155058 256860 37332 7449250 71aaa2 32-bit i965_dri.so before
7154994 256860 37332 7449186 71aa62 32-bit i965_dri.so after
6788611 328056 50704 7167371 6d5d8b 64-bit i965_dri.so before
6788475 328056 50704 7167235 6d5d03 64-bit i965_dri.so after

Signed-off-by: Ian Romanick <***@intel.com>
---
src/mesa/drivers/common/meta.c | 20 ++++++++------------
1 file changed, 8 insertions(+), 12 deletions(-)

diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index 85e766a..79dbab7 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -1633,7 +1633,6 @@ meta_clear(struct gl_context *ctx, GLbitfield buffers, bool glsl)
GLbitfield metaSave;
const GLuint stencilMax = (1 << ctx->DrawBuffer->Visual.stencilBits) - 1;
struct gl_framebuffer *fb = ctx->DrawBuffer;
- float x0, y0, x1, y1, z;
struct vertex verts[4];
int i;

@@ -1669,21 +1668,12 @@ meta_clear(struct gl_context *ctx, GLbitfield buffers, bool glsl)
assert(!fb->_IntegerBuffers);
if (glsl) {
meta_glsl_clear_init(ctx, clear);
-
- x0 = ((float) fb->_Xmin / fb->Width) * 2.0f - 1.0f;
- y0 = ((float) fb->_Ymin / fb->Height) * 2.0f - 1.0f;
- x1 = ((float) fb->_Xmax / fb->Width) * 2.0f - 1.0f;
- y1 = ((float) fb->_Ymax / fb->Height) * 2.0f - 1.0f;
- z = -invert_z(ctx->Depth.Clear);
} else {
_mesa_meta_setup_vertex_objects(ctx, &clear->VAO, &clear->buf_obj, false,
3, 0, 4);

- x0 = (float) fb->_Xmin;
- y0 = (float) fb->_Ymin;
- x1 = (float) fb->_Xmax;
- y1 = (float) fb->_Ymax;
- z = invert_z(ctx->Depth.Clear);
+ /* setup projection matrix */
+ _mesa_load_identity_matrix(ctx, &ctx->ProjectionMatrixStack);
}

if (glsl) {
@@ -1730,6 +1720,12 @@ meta_clear(struct gl_context *ctx, GLbitfield buffers, bool glsl)
}

/* vertex positions */
+ const float x0 = ((float) fb->_Xmin / fb->Width) * 2.0f - 1.0f;
+ const float y0 = ((float) fb->_Ymin / fb->Height) * 2.0f - 1.0f;
+ const float x1 = ((float) fb->_Xmax / fb->Width) * 2.0f - 1.0f;
+ const float y1 = ((float) fb->_Ymax / fb->Height) * 2.0f - 1.0f;
+ const float z = -invert_z(ctx->Depth.Clear);
+
verts[0].x = x0;
verts[0].y = y0;
verts[0].z = z;
--
2.9.4
Ian Romanick
2017-06-19 02:07:51 UTC
Permalink
Raw Message
From: Ian Romanick <***@intel.com>

Signed-off-by: Ian Romanick <***@intel.com>
---
src/mesa/drivers/dri/i915/intel_mipmap_tree.c | 5 ++---
src/mesa/drivers/dri/i915/intel_regions.c | 21 ++-------------------
src/mesa/drivers/dri/i915/intel_regions.h | 5 ++---
src/mesa/drivers/dri/i915/intel_screen.c | 7 +++----
4 files changed, 9 insertions(+), 29 deletions(-)

diff --git a/src/mesa/drivers/dri/i915/intel_mipmap_tree.c b/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
index 6c0f55b..bb6166e 100644
--- a/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
@@ -525,14 +525,13 @@ intel_miptree_get_tile_offsets(struct intel_mipmap_tree *mt,
uint32_t x, y;
uint32_t mask_x, mask_y;

- intel_region_get_tile_masks(region, &mask_x, &mask_y, false);
+ intel_region_get_tile_masks(region, &mask_x, &mask_y);
intel_miptree_get_image_offset(mt, level, slice, &x, &y);

*tile_x = x & mask_x;
*tile_y = y & mask_y;

- return intel_region_get_aligned_offset(region, x & ~mask_x, y & ~mask_y,
- false);
+ return intel_region_get_aligned_offset(region, x & ~mask_x, y & ~mask_y);
}

static void
diff --git a/src/mesa/drivers/dri/i915/intel_regions.c b/src/mesa/drivers/dri/i915/intel_regions.c
index c9b776d..be0dca4 100644
--- a/src/mesa/drivers/dri/i915/intel_regions.c
+++ b/src/mesa/drivers/dri/i915/intel_regions.c
@@ -284,15 +284,11 @@ intel_region_release(struct intel_region **region_handle)
*/
void
intel_region_get_tile_masks(struct intel_region *region,
- uint32_t *mask_x, uint32_t *mask_y,
- bool map_stencil_as_y_tiled)
+ uint32_t *mask_x, uint32_t *mask_y)
{
int cpp = region->cpp;
uint32_t tiling = region->tiling;

- if (map_stencil_as_y_tiled)
- tiling = I915_TILING_Y;
-
switch (tiling) {
default:
assert(false);
@@ -317,25 +313,12 @@ intel_region_get_tile_masks(struct intel_region *region,
*/
uint32_t
intel_region_get_aligned_offset(struct intel_region *region, uint32_t x,
- uint32_t y, bool map_stencil_as_y_tiled)
+ uint32_t y)
{
int cpp = region->cpp;
uint32_t pitch = region->pitch;
uint32_t tiling = region->tiling;

- if (map_stencil_as_y_tiled) {
- tiling = I915_TILING_Y;
-
- /* When mapping a W-tiled stencil buffer as Y-tiled, each 64-high W-tile
- * gets transformed into a 32-high Y-tile. Accordingly, the pitch of
- * the resulting region is twice the pitch of the original region, since
- * each row in the Y-tiled view corresponds to two rows in the actual
- * W-tiled surface. So we need to correct the pitch before computing
- * the offsets.
- */
- pitch *= 2;
- }
-
switch (tiling) {
default:
assert(false);
diff --git a/src/mesa/drivers/dri/i915/intel_regions.h b/src/mesa/drivers/dri/i915/intel_regions.h
index 562f7cd..05375f1 100644
--- a/src/mesa/drivers/dri/i915/intel_regions.h
+++ b/src/mesa/drivers/dri/i915/intel_regions.h
@@ -101,12 +101,11 @@ void intel_recreate_static_regions(struct intel_context *intel);

void
intel_region_get_tile_masks(struct intel_region *region,
- uint32_t *mask_x, uint32_t *mask_y,
- bool map_stencil_as_y_tiled);
+ uint32_t *mask_x, uint32_t *mask_y);

uint32_t
intel_region_get_aligned_offset(struct intel_region *region, uint32_t x,
- uint32_t y, bool map_stencil_as_y_tiled);
+ uint32_t y);

/**
* Used with images created with image_from_names
diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c
index cba5434..fe8ece78f 100644
--- a/src/mesa/drivers/dri/i915/intel_screen.c
+++ b/src/mesa/drivers/dri/i915/intel_screen.c
@@ -278,7 +278,7 @@ intel_setup_image_from_mipmap_tree(struct intel_context *intel, __DRIimage *imag

intel_miptree_check_level_layer(mt, level, zoffset);

- intel_region_get_tile_masks(mt->region, &mask_x, &mask_y, false);
+ intel_region_get_tile_masks(mt->region, &mask_x, &mask_y);
intel_miptree_get_image_offset(mt, level, zoffset, &draw_x, &draw_y);

image->width = mt->level[level].width;
@@ -288,8 +288,7 @@ intel_setup_image_from_mipmap_tree(struct intel_context *intel, __DRIimage *imag

image->offset = intel_region_get_aligned_offset(mt->region,
draw_x & ~mask_x,
- draw_y & ~mask_y,
- false);
+ draw_y & ~mask_y);

intel_region_reference(&image->region, mt->region);
}
@@ -685,7 +684,7 @@ intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate)
image->offset = offset;
intel_setup_image_from_dimensions(image);

- intel_region_get_tile_masks(image->region, &mask_x, &mask_y, false);
+ intel_region_get_tile_masks(image->region, &mask_x, &mask_y);
if (offset & mask_x)
_mesa_warning(NULL,
"intel_create_sub_image: offset not on tile boundary");
--
2.9.4
Ville Syrjälä
2017-06-20 15:55:26 UTC
Permalink
Raw Message
I have the same patch in my tree :)
Post by Ian Romanick
---
src/mesa/drivers/dri/i915/intel_mipmap_tree.c | 5 ++---
src/mesa/drivers/dri/i915/intel_regions.c | 21 ++-------------------
src/mesa/drivers/dri/i915/intel_regions.h | 5 ++---
src/mesa/drivers/dri/i915/intel_screen.c | 7 +++----
4 files changed, 9 insertions(+), 29 deletions(-)
diff --git a/src/mesa/drivers/dri/i915/intel_mipmap_tree.c b/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
index 6c0f55b..bb6166e 100644
--- a/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
@@ -525,14 +525,13 @@ intel_miptree_get_tile_offsets(struct intel_mipmap_tree *mt,
uint32_t x, y;
uint32_t mask_x, mask_y;
- intel_region_get_tile_masks(region, &mask_x, &mask_y, false);
+ intel_region_get_tile_masks(region, &mask_x, &mask_y);
intel_miptree_get_image_offset(mt, level, slice, &x, &y);
*tile_x = x & mask_x;
*tile_y = y & mask_y;
- return intel_region_get_aligned_offset(region, x & ~mask_x, y & ~mask_y,
- false);
+ return intel_region_get_aligned_offset(region, x & ~mask_x, y & ~mask_y);
}
static void
diff --git a/src/mesa/drivers/dri/i915/intel_regions.c b/src/mesa/drivers/dri/i915/intel_regions.c
index c9b776d..be0dca4 100644
--- a/src/mesa/drivers/dri/i915/intel_regions.c
+++ b/src/mesa/drivers/dri/i915/intel_regions.c
@@ -284,15 +284,11 @@ intel_region_release(struct intel_region **region_handle)
*/
void
intel_region_get_tile_masks(struct intel_region *region,
- uint32_t *mask_x, uint32_t *mask_y,
- bool map_stencil_as_y_tiled)
+ uint32_t *mask_x, uint32_t *mask_y)
{
int cpp = region->cpp;
uint32_t tiling = region->tiling;
- if (map_stencil_as_y_tiled)
- tiling = I915_TILING_Y;
-
switch (tiling) {
assert(false);
@@ -317,25 +313,12 @@ intel_region_get_tile_masks(struct intel_region *region,
*/
uint32_t
intel_region_get_aligned_offset(struct intel_region *region, uint32_t x,
- uint32_t y, bool map_stencil_as_y_tiled)
+ uint32_t y)
{
int cpp = region->cpp;
uint32_t pitch = region->pitch;
uint32_t tiling = region->tiling;
- if (map_stencil_as_y_tiled) {
- tiling = I915_TILING_Y;
-
- /* When mapping a W-tiled stencil buffer as Y-tiled, each 64-high W-tile
- * gets transformed into a 32-high Y-tile. Accordingly, the pitch of
- * the resulting region is twice the pitch of the original region, since
- * each row in the Y-tiled view corresponds to two rows in the actual
- * W-tiled surface. So we need to correct the pitch before computing
- * the offsets.
- */
- pitch *= 2;
- }
-
switch (tiling) {
assert(false);
diff --git a/src/mesa/drivers/dri/i915/intel_regions.h b/src/mesa/drivers/dri/i915/intel_regions.h
index 562f7cd..05375f1 100644
--- a/src/mesa/drivers/dri/i915/intel_regions.h
+++ b/src/mesa/drivers/dri/i915/intel_regions.h
@@ -101,12 +101,11 @@ void intel_recreate_static_regions(struct intel_context *intel);
void
intel_region_get_tile_masks(struct intel_region *region,
- uint32_t *mask_x, uint32_t *mask_y,
- bool map_stencil_as_y_tiled);
+ uint32_t *mask_x, uint32_t *mask_y);
uint32_t
intel_region_get_aligned_offset(struct intel_region *region, uint32_t x,
- uint32_t y, bool map_stencil_as_y_tiled);
+ uint32_t y);
/**
* Used with images created with image_from_names
diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c
index cba5434..fe8ece78f 100644
--- a/src/mesa/drivers/dri/i915/intel_screen.c
+++ b/src/mesa/drivers/dri/i915/intel_screen.c
@@ -278,7 +278,7 @@ intel_setup_image_from_mipmap_tree(struct intel_context *intel, __DRIimage *imag
intel_miptree_check_level_layer(mt, level, zoffset);
- intel_region_get_tile_masks(mt->region, &mask_x, &mask_y, false);
+ intel_region_get_tile_masks(mt->region, &mask_x, &mask_y);
intel_miptree_get_image_offset(mt, level, zoffset, &draw_x, &draw_y);
image->width = mt->level[level].width;
@@ -288,8 +288,7 @@ intel_setup_image_from_mipmap_tree(struct intel_context *intel, __DRIimage *imag
image->offset = intel_region_get_aligned_offset(mt->region,
draw_x & ~mask_x,
- draw_y & ~mask_y,
- false);
+ draw_y & ~mask_y);
intel_region_reference(&image->region, mt->region);
}
@@ -685,7 +684,7 @@ intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate)
image->offset = offset;
intel_setup_image_from_dimensions(image);
- intel_region_get_tile_masks(image->region, &mask_x, &mask_y, false);
+ intel_region_get_tile_masks(image->region, &mask_x, &mask_y);
if (offset & mask_x)
_mesa_warning(NULL,
"intel_create_sub_image: offset not on tile boundary");
--
2.9.4
_______________________________________________
mesa-dev mailing list
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
--
Ville Syrjälä
Intel OTC
Ian Romanick
2017-06-19 02:07:41 UTC
Permalink
Raw Message
From: Ian Romanick <***@intel.com>

Since i965 no longer uses this function for clearing color buffers,
there is no driver left that will ever support integer textures and use
_mesa_meta_glsl_Clear.

As a side note, the has_integer_textures check was rubbish anyway
because meta always smashes the API to API_OPENGL_COMPAT.

text data bss dec hex filename
7155858 256860 37332 7450050 71adc2 32-bit i965_dri.so before
7155026 256860 37332 7449218 71aa82 32-bit i965_dri.so after
6789299 328056 50704 7168059 6d603b 64-bit i965_dri.so before
6788499 328056 50704 7167259 6d5d1b 64-bit i965_dri.so after

Signed-off-by: Ian Romanick <***@intel.com>
---
src/mesa/drivers/common/meta.c | 55 ++----------------------------------------
src/mesa/drivers/common/meta.h | 1 -
2 files changed, 2 insertions(+), 54 deletions(-)

diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index 39499c7..9c1a4f2 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -1497,7 +1497,6 @@ meta_glsl_clear_init(struct gl_context *ctx, struct clear_state *clear)
"{\n"
" gl_FragColor = color;\n"
"}\n";
- bool has_integer_textures;

_mesa_meta_setup_vertex_objects(ctx, &clear->VAO, &clear->buf_obj, true,
3, 0, 0);
@@ -1507,49 +1506,6 @@ meta_glsl_clear_init(struct gl_context *ctx, struct clear_state *clear)

_mesa_meta_compile_and_link_program(ctx, vs_source, fs_source, "meta clear",
&clear->ShaderProg);
-
- has_integer_textures = _mesa_is_gles3(ctx) ||
- (_mesa_is_desktop_gl(ctx) && ctx->Const.GLSLVersion >= 130);
-
- if (has_integer_textures) {
- void *shader_source_mem_ctx = ralloc_context(NULL);
- const char *vs_int_source =
- ralloc_asprintf(shader_source_mem_ctx,
- "#version 130\n"
- "#extension GL_AMD_vertex_shader_layer : enable\n"
- "#extension GL_ARB_draw_instanced : enable\n"
- "#extension GL_ARB_explicit_attrib_location :enable\n"
- "layout(location = 0) in vec4 position;\n"
- "void main()\n"
- "{\n"
- "#ifdef GL_AMD_vertex_shader_layer\n"
- " gl_Layer = gl_InstanceID;\n"
- "#endif\n"
- " gl_Position = position;\n"
- "}\n");
- const char *fs_int_source =
- ralloc_asprintf(shader_source_mem_ctx,
- "#version 130\n"
- "#extension GL_ARB_explicit_attrib_location :enable\n"
- "#extension GL_ARB_explicit_uniform_location :enable\n"
- "layout(location = 0) uniform ivec4 color;\n"
- "out ivec4 out_color;\n"
- "\n"
- "void main()\n"
- "{\n"
- " out_color = color;\n"
- "}\n");
-
- _mesa_meta_compile_and_link_program(ctx, vs_int_source, fs_int_source,
- "integer clear",
- &clear->IntegerShaderProg);
- ralloc_free(shader_source_mem_ctx);
-
- /* Note that user-defined out attributes get automatically assigned
- * locations starting from 0, so we don't need to explicitly
- * BindFragDataLocation to 0.
- */
- }
}

static void
@@ -1561,10 +1517,6 @@ meta_glsl_clear_cleanup(struct gl_context *ctx, struct clear_state *clear)
clear->VAO = 0;
_mesa_reference_buffer_object(ctx, &clear->buf_obj, NULL);
_mesa_reference_shader_program(ctx, &clear->ShaderProg, NULL);
-
- if (clear->IntegerShaderProg) {
- _mesa_reference_shader_program(ctx, &clear->IntegerShaderProg, NULL);
- }
}

/**
@@ -1725,6 +1677,7 @@ meta_clear(struct gl_context *ctx, GLbitfield buffers, bool glsl)

_mesa_meta_begin(ctx, metaSave);

+ assert(!fb->_IntegerBuffers);
if (glsl) {
meta_glsl_clear_init(ctx, clear);

@@ -1744,11 +1697,7 @@ meta_clear(struct gl_context *ctx, GLbitfield buffers, bool glsl)
z = invert_z(ctx->Depth.Clear);
}

- if (fb->_IntegerBuffers) {
- assert(glsl);
- _mesa_meta_use_program(ctx, clear->IntegerShaderProg);
- _mesa_Uniform4iv(0, 1, ctx->Color.ClearColor.i);
- } else if (glsl) {
+ if (glsl) {
_mesa_meta_use_program(ctx, clear->ShaderProg);
_mesa_Uniform4fv(0, 1, ctx->Color.ClearColor.f);
}
diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h
index 1b5cf42..c09cb3e 100644
--- a/src/mesa/drivers/common/meta.h
+++ b/src/mesa/drivers/common/meta.h
@@ -325,7 +325,6 @@ struct clear_state
GLuint VAO;
struct gl_buffer_object *buf_obj;
struct gl_shader_program *ShaderProg;
- struct gl_shader_program *IntegerShaderProg;
};
--
2.9.4
Ian Romanick
2017-06-19 02:07:45 UTC
Permalink
Raw Message
From: Ian Romanick <***@intel.com>

text data bss dec hex filename
7154994 256860 37332 7449186 71aa62 32-bit i965_dri.so before
7154994 256860 37332 7449186 71aa62 32-bit i965_dri.so after
6788475 328056 50704 7167235 6d5d03 64-bit i965_dri.so before
6788451 328056 50704 7167211 6d5ceb 64-bit i965_dri.so after

Signed-off-by: Ian Romanick <***@intel.com>
---
src/mesa/drivers/common/meta.c | 23 +++++++++--------------
1 file changed, 9 insertions(+), 14 deletions(-)

diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index 79dbab7..fa3e1df 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -1634,7 +1634,6 @@ meta_clear(struct gl_context *ctx, GLbitfield buffers, bool glsl)
const GLuint stencilMax = (1 << ctx->DrawBuffer->Visual.stencilBits) - 1;
struct gl_framebuffer *fb = ctx->DrawBuffer;
struct vertex verts[4];
- int i;

metaSave = (MESA_META_ALPHA_TEST |
MESA_META_BLEND |
@@ -1668,17 +1667,22 @@ meta_clear(struct gl_context *ctx, GLbitfield buffers, bool glsl)
assert(!fb->_IntegerBuffers);
if (glsl) {
meta_glsl_clear_init(ctx, clear);
+
+ _mesa_meta_use_program(ctx, clear->ShaderProg);
+ _mesa_Uniform4fv(0, 1, ctx->Color.ClearColor.f);
} else {
_mesa_meta_setup_vertex_objects(ctx, &clear->VAO, &clear->buf_obj, false,
3, 0, 4);

/* setup projection matrix */
_mesa_load_identity_matrix(ctx, &ctx->ProjectionMatrixStack);
- }

- if (glsl) {
- _mesa_meta_use_program(ctx, clear->ShaderProg);
- _mesa_Uniform4fv(0, 1, ctx->Color.ClearColor.f);
+ for (int i = 0; i < 4; i++) {
+ verts[i].r = ctx->Color.ClearColor.f[0];
+ verts[i].g = ctx->Color.ClearColor.f[1];
+ verts[i].b = ctx->Color.ClearColor.f[2];
+ verts[i].a = ctx->Color.ClearColor.f[3];
+ }
}

/* GL_COLOR_BUFFER_BIT */
@@ -1739,15 +1743,6 @@ meta_clear(struct gl_context *ctx, GLbitfield buffers, bool glsl)
verts[3].y = y1;
verts[3].z = z;

- if (!glsl) {
- for (i = 0; i < 4; i++) {
- verts[i].r = ctx->Color.ClearColor.f[0];
- verts[i].g = ctx->Color.ClearColor.f[1];
- verts[i].b = ctx->Color.ClearColor.f[2];
- verts[i].a = ctx->Color.ClearColor.f[3];
- }
- }
-
/* upload new vertex data */
_mesa_buffer_data(ctx, clear->buf_obj, GL_NONE, sizeof(verts), verts,
GL_DYNAMIC_DRAW, __func__);
--
2.9.4
Ian Romanick
2017-06-19 02:07:46 UTC
Permalink
Raw Message
From: Ian Romanick <***@intel.com>

Meta always sets the API to API_OPENGL_COMPAT, so the current API
setting is irrelevant.

text data bss dec hex filename
7154994 256860 37332 7449186 71aa62 32-bit i965_dri.so before
7154978 256860 37332 7449170 71aa52 32-bit i965_dri.so after
6788451 328056 50704 7167211 6d5ceb 64-bit i965_dri.so before
6788419 328056 50704 7167179 6d5ccb 64-bit i965_dri.so after

Signed-off-by: Ian Romanick <***@intel.com>
---
src/mesa/drivers/dri/i915/intel_clear.c | 2 +-
src/mesa/drivers/dri/i965/brw_clear.c | 7 +------
2 files changed, 2 insertions(+), 7 deletions(-)

diff --git a/src/mesa/drivers/dri/i915/intel_clear.c b/src/mesa/drivers/dri/i915/intel_clear.c
index 4306826..f8df2e0 100644
--- a/src/mesa/drivers/dri/i915/intel_clear.c
+++ b/src/mesa/drivers/dri/i915/intel_clear.c
@@ -181,7 +181,7 @@ intelClear(struct gl_context *ctx, GLbitfield mask)

if (tri_mask) {
debug_mask("tri", tri_mask);
- if (ctx->API == API_OPENGLES || !ctx->Extensions.ARB_fragment_shader)
+ if (!ctx->Extensions.ARB_fragment_shader)
_mesa_meta_Clear(&intel->ctx, tri_mask);
else
_mesa_meta_glsl_Clear(&intel->ctx, tri_mask);
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c
index 45e93f4..1e434c9 100644
--- a/src/mesa/drivers/dri/i965/brw_clear.c
+++ b/src/mesa/drivers/dri/i965/brw_clear.c
@@ -246,12 +246,7 @@ brw_clear(struct gl_context *ctx, GLbitfield mask)
if (tri_mask) {
debug_mask("tri", tri_mask);
mask &= ~tri_mask;
-
- if (ctx->API == API_OPENGLES) {
- _mesa_meta_Clear(&brw->ctx, tri_mask);
- } else {
- _mesa_meta_glsl_Clear(&brw->ctx, tri_mask);
- }
+ _mesa_meta_glsl_Clear(&brw->ctx, tri_mask);
}

/* Any strange buffers get passed off to swrast. The only thing that
--
2.9.4
Ian Romanick
2017-06-19 02:07:47 UTC
Permalink
Raw Message
From: Ian Romanick <***@intel.com>

Signed-off-by: Ian Romanick <***@intel.com>
---
src/mesa/drivers/dri/i915/intel_mipmap_tree.c | 110 +++++++++++++-------------
1 file changed, 54 insertions(+), 56 deletions(-)

diff --git a/src/mesa/drivers/dri/i915/intel_mipmap_tree.c b/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
index 5cbf763..860d053 100644
--- a/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
@@ -1,8 +1,8 @@
/**************************************************************************
- *
+ *
* Copyright 2006 VMware, Inc.
* All Rights Reserved.
- *
+ *
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
- *
+ *
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
- *
+ *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@@ -22,7 +22,7 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
+ *
**************************************************************************/

#include <GL/gl.h>
@@ -96,7 +96,7 @@ intel_miptree_create_layout(struct intel_context *intel,
mt->cpp = _mesa_get_format_bytes(mt->format) / bw;

mt->compressed = _mesa_is_format_compressed(format);
- mt->refcount = 1;
+ mt->refcount = 1;

if (target == GL_TEXTURE_CUBE_MAP) {
assert(depth0 == 1);
@@ -108,9 +108,8 @@ intel_miptree_create_layout(struct intel_context *intel,
mt->physical_depth0 = depth0;

intel_get_texture_alignment_unit(intel, mt->format,
- &mt->align_w, &mt->align_h);
+ &mt->align_w, &mt->align_h);

- (void) intel;
if (intel->is_945)
i945_miptree_layout(mt);
else
@@ -159,14 +158,14 @@ intel_miptree_choose_tiling(struct intel_context *intel,

struct intel_mipmap_tree *
intel_miptree_create(struct intel_context *intel,
- GLenum target,
- mesa_format format,
- GLuint first_level,
- GLuint last_level,
- GLuint width0,
- GLuint height0,
- GLuint depth0,
- bool expect_accelerated_upload,
+ GLenum target,
+ mesa_format format,
+ GLuint first_level,
+ GLuint last_level,
+ GLuint width0,
+ GLuint height0,
+ GLuint depth0,
+ bool expect_accelerated_upload,
enum intel_miptree_tiling_mode requested_tiling)
{
struct intel_mipmap_tree *mt;
@@ -174,11 +173,10 @@ intel_miptree_create(struct intel_context *intel,


mt = intel_miptree_create_layout(intel, target, format,
- first_level, last_level, width0,
- height0, depth0);
- /*
- * pitch == 0 || height == 0 indicates the null texture
- */
+ first_level, last_level, width0,
+ height0, depth0);
+
+ /* pitch == 0 || height == 0 indicates the null texture */
if (!mt || !mt->total_width || !mt->total_height) {
intel_miptree_release(&mt);
return NULL;
@@ -193,11 +191,11 @@ intel_miptree_create(struct intel_context *intel,
bool y_or_x = tiling == (I915_TILING_Y | I915_TILING_X);

mt->region = intel_region_alloc(intel->intelScreen,
- y_or_x ? I915_TILING_Y : tiling,
- mt->cpp,
- total_width,
- total_height,
- expect_accelerated_upload);
+ y_or_x ? I915_TILING_Y : tiling,
+ mt->cpp,
+ total_width,
+ total_height,
+ expect_accelerated_upload);

/* If the region is too large to fit in the aperture, we need to use the
* BLT engine to support it. The BLT paths can't currently handle Y-tiling,
@@ -284,7 +282,7 @@ intel_miptree_create_for_bo(struct intel_context *intel,
* a singlesample miptree, then creates a multisample miptree into which the
* singlesample miptree is embedded as a child.
*/
-struct intel_mipmap_tree*
+struct intel_mipmap_tree *
intel_miptree_create_for_dri2_buffer(struct intel_context *intel,
unsigned dri_attachment,
mesa_format format,
@@ -323,7 +321,7 @@ intel_miptree_create_for_dri2_buffer(struct intel_context *intel,
* a singlesample miptree, then creates a multisample miptree into which the
* singlesample miptree is embedded as a child.
*/
-struct intel_mipmap_tree*
+struct intel_mipmap_tree *
intel_miptree_create_for_image_buffer(struct intel_context *intel,
enum __DRIimageBufferMask buffer_type,
mesa_format format,
@@ -349,7 +347,7 @@ intel_miptree_create_for_image_buffer(struct intel_context *intel,
return mt;
}

-struct intel_mipmap_tree*
+struct intel_mipmap_tree *
intel_miptree_create_for_renderbuffer(struct intel_context *intel,
mesa_format format,
uint32_t width,
@@ -395,7 +393,7 @@ intel_miptree_release(struct intel_mipmap_tree **mt)
intel_region_release(&((*mt)->region));

for (i = 0; i < MAX_TEXTURE_LEVELS; i++) {
- free((*mt)->level[i].slice);
+ free((*mt)->level[i].slice);
}

free(*mt);
@@ -456,7 +454,7 @@ intel_miptree_match_image(struct intel_mipmap_tree *mt,
* tree, changed targets, etc.
*/
if (mt->target == GL_TEXTURE_2D_MULTISAMPLE ||
- mt->target == GL_TEXTURE_2D_MULTISAMPLE_ARRAY) {
+ mt->target == GL_TEXTURE_2D_MULTISAMPLE_ARRAY) {
/* nonzero level here is always bogus */
assert(level == 0);

@@ -481,9 +479,9 @@ intel_miptree_match_image(struct intel_mipmap_tree *mt,

void
intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
- GLuint level,
- GLuint x, GLuint y,
- GLuint w, GLuint h, GLuint d)
+ GLuint level,
+ GLuint x, GLuint y,
+ GLuint w, GLuint h, GLuint d)
{
mt->level[level].width = w;
mt->level[level].height = h;
@@ -504,8 +502,8 @@ intel_miptree_set_level_info(struct intel_mipmap_tree *mt,

void
intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,
- GLuint level, GLuint img,
- GLuint x, GLuint y)
+ GLuint level, GLuint img,
+ GLuint x, GLuint y)
{
if (img == 0 && level == 0)
assert(x == 0 && y == 0);
@@ -523,8 +521,8 @@ intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,

void
intel_miptree_get_image_offset(struct intel_mipmap_tree *mt,
- GLuint level, GLuint slice,
- GLuint *x, GLuint *y)
+ GLuint level, GLuint slice,
+ GLuint *x, GLuint *y)
{
assert(slice < mt->level[level].depth);

@@ -614,11 +612,11 @@ intel_miptree_copy_slice_sw(struct intel_context *intel,

static void
intel_miptree_copy_slice(struct intel_context *intel,
- struct intel_mipmap_tree *dst_mt,
- struct intel_mipmap_tree *src_mt,
- int level,
- int face,
- int depth)
+ struct intel_mipmap_tree *dst_mt,
+ struct intel_mipmap_tree *src_mt,
+ int level,
+ int face,
+ int depth)

{
mesa_format format = src_mt->format;
@@ -672,8 +670,8 @@ intel_miptree_copy_slice(struct intel_context *intel,
*/
void
intel_miptree_copy_teximage(struct intel_context *intel,
- struct intel_texture_image *intelImage,
- struct intel_mipmap_tree *dst_mt,
+ struct intel_texture_image *intelImage,
+ struct intel_mipmap_tree *dst_mt,
bool invalidate)
{
struct intel_mipmap_tree *src_mt = intelImage->mt;
@@ -722,9 +720,9 @@ intel_miptree_unmap_raw(struct intel_mipmap_tree *mt)

static void
intel_miptree_map_gtt(struct intel_context *intel,
- struct intel_mipmap_tree *mt,
- struct intel_miptree_map *map,
- unsigned int level, unsigned int slice)
+ struct intel_mipmap_tree *mt,
+ struct intel_miptree_map *map,
+ unsigned int level, unsigned int slice)
{
unsigned int bw, bh;
void *base;
@@ -770,9 +768,9 @@ intel_miptree_unmap_gtt(struct intel_mipmap_tree *mt)

static void
intel_miptree_map_blit(struct intel_context *intel,
- struct intel_mipmap_tree *mt,
- struct intel_miptree_map *map,
- unsigned int level, unsigned int slice)
+ struct intel_mipmap_tree *mt,
+ struct intel_miptree_map *map,
+ unsigned int level, unsigned int slice)
{
map->mt = intel_miptree_create(intel, GL_TEXTURE_2D, mt->format,
0, 0,
@@ -813,10 +811,10 @@ fail:

static void
intel_miptree_unmap_blit(struct intel_context *intel,
- struct intel_mipmap_tree *mt,
- struct intel_miptree_map *map,
- unsigned int level,
- unsigned int slice)
+ struct intel_mipmap_tree *mt,
+ struct intel_miptree_map *map,
+ unsigned int level,
+ unsigned int slice)
{
struct gl_context *ctx = &intel->ctx;

@@ -897,7 +895,7 @@ intel_miptree_map(struct intel_context *intel,
struct intel_miptree_map *map;

map = intel_miptree_attach_map(mt, level, slice, x, y, w, h, mode);
- if (!map){
+ if (!map) {
*out_ptr = NULL;
*out_stride = 0;
return;
--
2.9.4
Ian Romanick
2017-06-19 02:07:50 UTC
Permalink
Raw Message
From: Ian Romanick <***@intel.com>

Signed-off-by: Ian Romanick <***@intel.com>
---
src/mesa/drivers/dri/i915/intel_mipmap_tree.c | 3 ---
src/mesa/drivers/dri/i915/intel_mipmap_tree.h | 8 --------
2 files changed, 11 deletions(-)

diff --git a/src/mesa/drivers/dri/i915/intel_mipmap_tree.c b/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
index 92f116b..6c0f55b 100644
--- a/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
@@ -83,9 +83,6 @@ intel_miptree_create_layout(struct intel_context *intel,
mt->format = format;
mt->first_level = first_level;
mt->last_level = last_level;
- mt->logical_width0 = width0;
- mt->logical_height0 = height0;
- mt->logical_depth0 = depth0;

/* The cpp is bytes per (1, blockheight)-sized block for compressed
* textures. This is why you'll see divides by blockheight all over
diff --git a/src/mesa/drivers/dri/i915/intel_mipmap_tree.h b/src/mesa/drivers/dri/i915/intel_mipmap_tree.h
index afe27e3..b4a8968 100644
--- a/src/mesa/drivers/dri/i915/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i915/intel_mipmap_tree.h
@@ -168,14 +168,6 @@ struct intel_mipmap_tree
GLuint cpp;
bool compressed;

- /**
- * Level zero image dimensions. These dimensions correspond to the
- * logical width, height, and depth of the region as seen by client code.
- * Accordingly, they do not account for the extra factor of 6 in depth that
- * must be allocated in order to accommodate cubemap textures.
- */
- uint32_t logical_width0, logical_height0, logical_depth0;
-
/* Derived from the above:
*/
GLuint total_width;
--
2.9.4
Ian Romanick
2017-06-19 02:07:48 UTC
Permalink
Raw Message
From: Ian Romanick <***@intel.com>

Signed-off-by: Ian Romanick <***@intel.com>
---
src/mesa/drivers/dri/i915/intel_mipmap_tree.c | 34 +++++----------------------
src/mesa/drivers/dri/i915/intel_mipmap_tree.h | 10 +++-----
src/mesa/drivers/dri/i915/intel_tex_layout.c | 3 ---
3 files changed, 9 insertions(+), 38 deletions(-)

diff --git a/src/mesa/drivers/dri/i915/intel_mipmap_tree.c b/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
index 860d053..92f116b 100644
--- a/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
@@ -276,11 +276,7 @@ intel_miptree_create_for_bo(struct intel_context *intel,


/**
- * For a singlesample DRI2 buffer, this simply wraps the given region with a miptree.
- *
- * For a multisample DRI2 buffer, this wraps the given region with
- * a singlesample miptree, then creates a multisample miptree into which the
- * singlesample miptree is embedded as a child.
+ * Wraps the given region with a miptree.
*/
struct intel_mipmap_tree *
intel_miptree_create_for_dri2_buffer(struct intel_context *intel,
@@ -315,11 +311,7 @@ intel_miptree_create_for_dri2_buffer(struct intel_context *intel,
}

/**
- * For a singlesample image buffer, this simply wraps the given region with a miptree.
- *
- * For a multisample image buffer, this wraps the given region with
- * a singlesample miptree, then creates a multisample miptree into which the
- * singlesample miptree is embedded as a child.
+ * Wraps the given region with a miptree.
*/
struct intel_mipmap_tree *
intel_miptree_create_for_image_buffer(struct intel_context *intel,
@@ -453,24 +445,10 @@ intel_miptree_match_image(struct intel_mipmap_tree *mt,
* minification. This will also catch images not present in the
* tree, changed targets, etc.
*/
- if (mt->target == GL_TEXTURE_2D_MULTISAMPLE ||
- mt->target == GL_TEXTURE_2D_MULTISAMPLE_ARRAY) {
- /* nonzero level here is always bogus */
- assert(level == 0);
-
- if (width != mt->logical_width0 ||
- height != mt->logical_height0 ||
- depth != mt->logical_depth0) {
- return false;
- }
- }
- else {
- /* all normal textures, renderbuffers, etc */
- if (width != mt->level[level].width ||
- height != mt->level[level].height ||
- depth != mt->level[level].depth) {
- return false;
- }
+ if (width != mt->level[level].width ||
+ height != mt->level[level].height ||
+ depth != mt->level[level].depth) {
+ return false;
}

return true;
diff --git a/src/mesa/drivers/dri/i915/intel_mipmap_tree.h b/src/mesa/drivers/dri/i915/intel_mipmap_tree.h
index 853a4a7..9294931 100644
--- a/src/mesa/drivers/dri/i915/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i915/intel_mipmap_tree.h
@@ -160,10 +160,8 @@ struct intel_mipmap_tree
/**
* Level zero image dimensions. These dimensions correspond to the
* physical layout of data in memory. Accordingly, they account for the
- * extra width, height, and or depth that must be allocated in order to
- * accommodate multisample formats, and they account for the extra factor
- * of 6 in depth that must be allocated in order to accommodate cubemap
- * textures.
+ * extra factor of 6 in depth that must be allocated in order to
+ * accommodate cubemap textures.
*/
GLuint physical_width0, physical_height0, physical_depth0;

@@ -173,9 +171,7 @@ struct intel_mipmap_tree
/**
* Level zero image dimensions. These dimensions correspond to the
* logical width, height, and depth of the region as seen by client code.
- * Accordingly, they do not account for the extra width, height, and/or
- * depth that must be allocated in order to accommodate multisample
- * formats, nor do they account for the extra factor of 6 in depth that
+ * Accordingly, they do not account for the extra factor of 6 in depth that
* must be allocated in order to accommodate cubemap textures.
*/
uint32_t logical_width0, logical_height0, logical_depth0;
diff --git a/src/mesa/drivers/dri/i915/intel_tex_layout.c b/src/mesa/drivers/dri/i915/intel_tex_layout.c
index 01ea165..efe7a8d 100644
--- a/src/mesa/drivers/dri/i915/intel_tex_layout.c
+++ b/src/mesa/drivers/dri/i915/intel_tex_layout.c
@@ -97,14 +97,11 @@ intel_vertical_texture_alignment_unit(struct intel_context *intel,
* | FXT1 compressed format | 4 | 4 | 4 | 4 | 4 |
* | Depth Buffer | 2 | 2 | 2 | 4 | 4 |
* | Separate Stencil Buffer | N/A | N/A | N/A | 4 | 8 |
- * | Multisampled (4x or 8x) render target | N/A | N/A | N/A | 4 | 4 |
* | All Others | 2 | 2 | 2 | 2 | 2 |
* +----------------------------------------------------------------------+
*
* On SNB+, non-special cases can be overridden by setting the SURFACE_STATE
* "Surface Vertical Alignment" field to VALIGN_2 or VALIGN_4.
- *
- * We currently don't support multisampling.
*/
if (_mesa_is_format_compressed(format))
return 4;
--
2.9.4
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