Discussion:
[PATCH 00/17] anv: Rework state tracking to better separate
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Jason Ekstrand
2017-12-16 01:08:58 UTC
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This series is intended to address a bug filed in September:

https://bugs.freedesktop.org/show_bug.cgi?id=102897

Unfortunately, the fix is either a lot of patches or very messy. This
series (as is common for me) takes the lots of patches approach. The
general idea is to break out a large chunk of anv_cmd_state into sub-
structs for graphics and compute. This way, it's very clear when you're
accessing any bit of state that you're pulling from one or the other. By
giving these a base struct, we can also make clear that a certain set of
states are are per-pipeline-bind-point. In order to reduce churn in the
patches which actually move state from one struct to another, there are
several patches which just make us make better use of helper functions and
temporary variables.

Jason Ekstrand (17):
anv/pipeline: Don't assert on more than 32 samplers
anv/cmd_state: Drop the scratch_size field
anv/cmd_buffer: Get rid of the meta query workaround
anv/cmd_buffer: Rework anv_cmd_state_reset
anv/cmd_buffer: Use some pre-existing pipeline temporaries
anv/cmd_buffer: Add substructs to anv_cmd_state for graphics and
compute
anv: Remove semicolons from vk_error[f] definitions
anv/cmd_buffer: Refactor ensure_push_descriptor_set
anv/cmd_buffer: Add a helper for binding descriptor sets
anv/cmd_buffer: Use anv_descriptor_for_binding for samplers
anv: Separate compute and graphics descriptor sets
anv/cmd_buffer: Move dirty bits into anv_cmd_*_state
anv/cmd_buffer: Move vb_dirty bits into anv_cmd_graphics_state
anv/cmd_buffer: Use a temporary variable for dynamic state
anv/cmd_buffer: Move dynamic state to graphics state
anv/cmd_buffer: Move num_workgroups to compute state
anv/cmd_buffer: Move gen7 index buffer state to graphics state

src/intel/vulkan/anv_cmd_buffer.c | 274 +++++++++++++++++++---------------
src/intel/vulkan/anv_descriptor_set.c | 2 +
src/intel/vulkan/anv_private.h | 85 ++++++++---
src/intel/vulkan/gen7_cmd_buffer.c | 67 ++++-----
src/intel/vulkan/gen8_cmd_buffer.c | 91 ++++++-----
src/intel/vulkan/genX_blorp_exec.c | 4 +-
src/intel/vulkan/genX_cmd_buffer.c | 121 ++++++++-------
src/intel/vulkan/genX_gpu_memcpy.c | 2 +-
src/intel/vulkan/genX_pipeline.c | 8 +-
src/intel/vulkan/genX_query.c | 14 --
10 files changed, 369 insertions(+), 299 deletions(-)
--
2.5.0.400.gff86faf
Jason Ekstrand
2017-12-16 01:08:59 UTC
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This prevents an assert when running one unreleased Vulkan game.
---
src/intel/vulkan/genX_pipeline.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 0ae9ead..b6a537b 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -1081,7 +1081,13 @@ emit_3dstate_streamout(struct anv_pipeline *pipeline,
static uint32_t
get_sampler_count(const struct anv_shader_bin *bin)
{
- return DIV_ROUND_UP(bin->bind_map.sampler_count, 4);
+ uint32_t count_by_4 = DIV_ROUND_UP(bin->bind_map.sampler_count, 4);
+
+ /* We can potentially have way more than 32 samplers and that's ok.
+ * However, the 3DSTATE_XS packets only have 3 bits to specify how
+ * many to pre-fetch and all values above 4 are marked reserved.
+ */
+ return MIN2(count_by_4, 4);
}

static uint32_t
--
2.5.0.400.gff86faf
Jason Ekstrand
2017-12-16 01:09:01 UTC
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Meta has been gone for a long time.
---
src/intel/vulkan/anv_cmd_buffer.c | 1 -
src/intel/vulkan/anv_private.h | 1 -
src/intel/vulkan/genX_query.c | 14 --------------
3 files changed, 16 deletions(-)

diff --git a/src/intel/vulkan/anv_cmd_buffer.c b/src/intel/vulkan/anv_cmd_buffer.c
index 69acafa..c0270e1 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -146,7 +146,6 @@ anv_cmd_state_reset(struct anv_cmd_buffer *cmd_buffer)
state->push_constant_stages = 0;
state->restart_index = UINT32_MAX;
state->dynamic = default_dynamic_state;
- state->need_query_wa = true;
state->pma_fix_enabled = false;
state->hiz_enabled = false;

diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 2d35aaa..d6436d5 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1704,7 +1704,6 @@ struct anv_cmd_state {
struct anv_state binding_tables[MESA_SHADER_STAGES];
struct anv_state samplers[MESA_SHADER_STAGES];
struct anv_dynamic_state dynamic;
- bool need_query_wa;

struct anv_push_descriptor_set * push_descriptors[MAX_SETS];

diff --git a/src/intel/vulkan/genX_query.c b/src/intel/vulkan/genX_query.c
index 7683d0d..726e565 100644
--- a/src/intel/vulkan/genX_query.c
+++ b/src/intel/vulkan/genX_query.c
@@ -385,20 +385,6 @@ void genX(CmdBeginQuery)(
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
ANV_FROM_HANDLE(anv_query_pool, pool, queryPool);

- /* Workaround: When meta uses the pipeline with the VS disabled, it seems
- * that the pipelining of the depth write breaks. What we see is that
- * samples from the render pass clear leaks into the first query
- * immediately after the clear. Doing a pipecontrol with a post-sync
- * operation and DepthStallEnable seems to work around the issue.
- */
- if (cmd_buffer->state.need_query_wa) {
- cmd_buffer->state.need_query_wa = false;
- anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
- pc.DepthCacheFlushEnable = true;
- pc.DepthStallEnable = true;
- }
- }
-
switch (pool->type) {
case VK_QUERY_TYPE_OCCLUSION:
emit_ps_depth_count(cmd_buffer, &pool->bo, query * pool->stride + 8);
--
2.5.0.400.gff86faf
Jason Ekstrand
2017-12-16 01:09:00 UTC
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This is a legacy left-over from the mechanism we used to use to handle
scratch. The new (and better) mechanism doesn't use this.
---
src/intel/vulkan/anv_private.h | 1 -
1 file changed, 1 deletion(-)

diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index b7bde4b..2d35aaa 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1689,7 +1689,6 @@ struct anv_cmd_state {
struct anv_bo *num_workgroups_bo;
VkShaderStageFlags descriptors_dirty;
VkShaderStageFlags push_constants_dirty;
- uint32_t scratch_size;
struct anv_pipeline * pipeline;
struct anv_pipeline * compute_pipeline;
struct anv_framebuffer * framebuffer;
--
2.5.0.400.gff86faf
Jason Ekstrand
2017-12-16 01:09:02 UTC
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This splits anv_cmd_state_reset into separate init and finish functions.
This lets us share init code with cmd_buffer_create. This potentially
fixes subtle bugs where we may have missed some bit of state that needs
to get initialized on command buffer creation.
---
src/intel/vulkan/anv_cmd_buffer.c | 60 ++++++++++++++-------------------------
1 file changed, 22 insertions(+), 38 deletions(-)

diff --git a/src/intel/vulkan/anv_cmd_buffer.c b/src/intel/vulkan/anv_cmd_buffer.c
index c0270e1..5436d54 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -113,46 +113,35 @@ anv_dynamic_state_copy(struct anv_dynamic_state *dest,
}

static void
-anv_cmd_state_reset(struct anv_cmd_buffer *cmd_buffer)
+anv_cmd_state_init(struct anv_cmd_buffer *cmd_buffer)
{
struct anv_cmd_state *state = &cmd_buffer->state;

- cmd_buffer->batch.status = VK_SUCCESS;
+ memset(state, 0, sizeof(*state));

- memset(&state->descriptors, 0, sizeof(state->descriptors));
- for (uint32_t i = 0; i < ARRAY_SIZE(state->push_descriptors); i++) {
- vk_free(&cmd_buffer->pool->alloc, state->push_descriptors[i]);
- state->push_descriptors[i] = NULL;
- }
- for (uint32_t i = 0; i < MESA_SHADER_STAGES; i++) {
- vk_free(&cmd_buffer->pool->alloc, state->push_constants[i]);
- state->push_constants[i] = NULL;
- }
- memset(state->binding_tables, 0, sizeof(state->binding_tables));
- memset(state->samplers, 0, sizeof(state->samplers));
-
- /* 0 isn't a valid config. This ensures that we always configure L3$. */
- cmd_buffer->state.current_l3_config = 0;
-
- state->dirty = 0;
- state->vb_dirty = 0;
- state->pending_pipe_bits = 0;
- state->descriptors_dirty = 0;
- state->push_constants_dirty = 0;
- state->pipeline = NULL;
- state->framebuffer = NULL;
- state->pass = NULL;
- state->subpass = NULL;
- state->push_constant_stages = 0;
state->restart_index = UINT32_MAX;
state->dynamic = default_dynamic_state;
- state->pma_fix_enabled = false;
- state->hiz_enabled = false;
+}
+
+static void
+anv_cmd_state_finish(struct anv_cmd_buffer *cmd_buffer)
+{
+ struct anv_cmd_state *state = &cmd_buffer->state;
+
+ for (uint32_t i = 0; i < ARRAY_SIZE(state->push_descriptors); i++)
+ vk_free(&cmd_buffer->pool->alloc, state->push_descriptors[i]);
+
+ for (uint32_t i = 0; i < MESA_SHADER_STAGES; i++)
+ vk_free(&cmd_buffer->pool->alloc, state->push_constants[i]);

vk_free(&cmd_buffer->pool->alloc, state->attachments);
- state->attachments = NULL;
+}

- state->gen7.index_buffer = NULL;
+static void
+anv_cmd_state_reset(struct anv_cmd_buffer *cmd_buffer)
+{
+ anv_cmd_state_finish(cmd_buffer);
+ anv_cmd_state_init(cmd_buffer);
}

VkResult
@@ -197,14 +186,10 @@ static VkResult anv_create_cmd_buffer(

cmd_buffer->batch.status = VK_SUCCESS;

- for (uint32_t i = 0; i < MESA_SHADER_STAGES; i++) {
- cmd_buffer->state.push_constants[i] = NULL;
- }
cmd_buffer->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
cmd_buffer->device = device;
cmd_buffer->pool = pool;
cmd_buffer->level = level;
- cmd_buffer->state.attachments = NULL;

result = anv_cmd_buffer_init_batch_bo_chain(cmd_buffer);
if (result != VK_SUCCESS)
@@ -215,8 +200,7 @@ static VkResult anv_create_cmd_buffer(
anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
&device->dynamic_state_pool, 16384);

- memset(cmd_buffer->state.push_descriptors, 0,
- sizeof(cmd_buffer->state.push_descriptors));
+ anv_cmd_state_init(cmd_buffer);

if (pool) {
list_addtail(&cmd_buffer->pool_link, &pool->cmd_buffers);
@@ -275,7 +259,7 @@ anv_cmd_buffer_destroy(struct anv_cmd_buffer *cmd_buffer)
anv_state_stream_finish(&cmd_buffer->surface_state_stream);
anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);

- anv_cmd_state_reset(cmd_buffer);
+ anv_cmd_state_finish(cmd_buffer);

vk_free(&cmd_buffer->pool->alloc, cmd_buffer);
}
--
2.5.0.400.gff86faf
Jason Ekstrand
2017-12-16 01:09:04 UTC
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Initially, these just contain the pipeline in a base struct.
---
src/intel/vulkan/anv_cmd_buffer.c | 12 +++++-----
src/intel/vulkan/anv_private.h | 41 ++++++++++++++++++++++++++++++++--
src/intel/vulkan/gen7_cmd_buffer.c | 2 +-
src/intel/vulkan/gen8_cmd_buffer.c | 6 ++---
src/intel/vulkan/genX_cmd_buffer.c | 45 ++++++++++++++++++++------------------
5 files changed, 74 insertions(+), 32 deletions(-)

diff --git a/src/intel/vulkan/anv_cmd_buffer.c b/src/intel/vulkan/anv_cmd_buffer.c
index 5436d54..dd50563 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -336,14 +336,14 @@ void anv_CmdBindPipeline(

switch (pipelineBindPoint) {
case VK_PIPELINE_BIND_POINT_COMPUTE:
- cmd_buffer->state.compute_pipeline = pipeline;
+ cmd_buffer->state.compute.base.pipeline = pipeline;
cmd_buffer->state.compute_dirty |= ANV_CMD_DIRTY_PIPELINE;
cmd_buffer->state.push_constants_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
cmd_buffer->state.descriptors_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
break;

case VK_PIPELINE_BIND_POINT_GRAPHICS:
- cmd_buffer->state.pipeline = pipeline;
+ cmd_buffer->state.gfx.base.pipeline = pipeline;
cmd_buffer->state.vb_dirty |= pipeline->vb_used;
cmd_buffer->state.dirty |= ANV_CMD_DIRTY_PIPELINE;
cmd_buffer->state.push_constants_dirty |= pipeline->active_stages;
@@ -636,14 +636,16 @@ struct anv_state
anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
gl_shader_stage stage)
{
+ struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;
+
/* If we don't have this stage, bail. */
- if (!anv_pipeline_has_stage(cmd_buffer->state.pipeline, stage))
+ if (!anv_pipeline_has_stage(pipeline, stage))
return (struct anv_state) { .offset = 0 };

struct anv_push_constants *data =
cmd_buffer->state.push_constants[stage];
const struct brw_stage_prog_data *prog_data =
- cmd_buffer->state.pipeline->shaders[stage]->prog_data;
+ pipeline->shaders[stage]->prog_data;

/* If we don't actually have any push constants, bail. */
if (data == NULL || prog_data == NULL || prog_data->nr_params == 0)
@@ -669,7 +671,7 @@ anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer)
{
struct anv_push_constants *data =
cmd_buffer->state.push_constants[MESA_SHADER_COMPUTE];
- struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline;
+ struct anv_pipeline *pipeline = cmd_buffer->state.compute.base.pipeline;
const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline);
const struct brw_stage_prog_data *prog_data = &cs_prog_data->base;

diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index d6436d5..9860778 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1676,11 +1676,49 @@ struct anv_attachment_state {
bool clear_color_is_zero;
};

+/** State tracking for particular pipeline bind point
+ *
+ * This struct is the base struct for anv_cmd_graphics_state and
+ * anv_cmd_compute_state. These are used to track state which is bound to a
+ * particular type of pipeline. Generic state that applies per-stage such as
+ * binding table offsets and push constants is tracked generically with a
+ * per-stage array in anv_cmd_state.
+ */
+struct anv_cmd_pipeline_state {
+ struct anv_pipeline *pipeline;
+};
+
+/** State tracking for graphics pipeline
+ *
+ * This has anv_cmd_pipeline_state as a base struct to track things which get
+ * bound to a graphics pipeline. Along with general pipeline bind point state
+ * which is in the anv_cmd_pipeline_state base struct, it also contains other
+ * state which is graphics-specific.
+ */
+struct anv_cmd_graphics_state {
+ struct anv_cmd_pipeline_state base;
+};
+
+/** State tracking for compute pipeline
+ *
+ * This has anv_cmd_pipeline_state as a base struct to track things which get
+ * bound to a compute pipeline. Along with general pipeline bind point state
+ * which is in the anv_cmd_pipeline_state base struct, it also contains other
+ * state which is compute-specific.
+ */
+struct anv_cmd_compute_state {
+ struct anv_cmd_pipeline_state base;
+};
+
/** State required while building cmd buffer */
struct anv_cmd_state {
/* PIPELINE_SELECT.PipelineSelection */
uint32_t current_pipeline;
const struct gen_l3_config * current_l3_config;
+
+ struct anv_cmd_graphics_state gfx;
+ struct anv_cmd_compute_state compute;
+
uint32_t vb_dirty;
anv_cmd_dirty_mask_t dirty;
anv_cmd_dirty_mask_t compute_dirty;
@@ -1689,8 +1727,7 @@ struct anv_cmd_state {
struct anv_bo *num_workgroups_bo;
VkShaderStageFlags descriptors_dirty;
VkShaderStageFlags push_constants_dirty;
- struct anv_pipeline * pipeline;
- struct anv_pipeline * compute_pipeline;
+
struct anv_framebuffer * framebuffer;
struct anv_render_pass * pass;
struct anv_subpass * subpass;
diff --git a/src/intel/vulkan/gen7_cmd_buffer.c b/src/intel/vulkan/gen7_cmd_buffer.c
index b05a0fd..8d7fd8f 100644
--- a/src/intel/vulkan/gen7_cmd_buffer.c
+++ b/src/intel/vulkan/gen7_cmd_buffer.c
@@ -154,7 +154,7 @@ get_depth_format(struct anv_cmd_buffer *cmd_buffer)
void
genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
{
- struct anv_pipeline *pipeline = cmd_buffer->state.pipeline;
+ struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;

if (cmd_buffer->state.dirty & (ANV_CMD_DIRTY_PIPELINE |
ANV_CMD_DIRTY_RENDER_TARGETS |
diff --git a/src/intel/vulkan/gen8_cmd_buffer.c b/src/intel/vulkan/gen8_cmd_buffer.c
index 687de41..002e50c 100644
--- a/src/intel/vulkan/gen8_cmd_buffer.c
+++ b/src/intel/vulkan/gen8_cmd_buffer.c
@@ -218,7 +218,7 @@ want_depth_pma_fix(struct anv_cmd_buffer *cmd_buffer)
return false;

/* 3DSTATE_PS_EXTRA::PixelShaderValid */
- struct anv_pipeline *pipeline = cmd_buffer->state.pipeline;
+ struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;
if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_FRAGMENT))
return false;

@@ -328,7 +328,7 @@ want_stencil_pma_fix(struct anv_cmd_buffer *cmd_buffer)
assert(ds_iview && ds_iview->image->planes[0].aux_usage == ISL_AUX_USAGE_HIZ);

/* 3DSTATE_PS_EXTRA::PixelShaderValid */
- struct anv_pipeline *pipeline = cmd_buffer->state.pipeline;
+ struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;
if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_FRAGMENT))
return false;

@@ -381,7 +381,7 @@ want_stencil_pma_fix(struct anv_cmd_buffer *cmd_buffer)
void
genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
{
- struct anv_pipeline *pipeline = cmd_buffer->state.pipeline;
+ struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;

if (cmd_buffer->state.dirty & (ANV_CMD_DIRTY_PIPELINE |
ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH)) {
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index 9a5e750..9d6f753 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -1369,7 +1369,8 @@ void genX(CmdPipelineBarrier)(
static void
cmd_buffer_alloc_push_constants(struct anv_cmd_buffer *cmd_buffer)
{
- VkShaderStageFlags stages = cmd_buffer->state.pipeline->active_stages;
+ VkShaderStageFlags stages =
+ cmd_buffer->state.gfx.base.pipeline->active_stages;

/* In order to avoid thrash, we assume that vertex and fragment stages
* always exist. In the rare case where one is missing *and* the other
@@ -1467,19 +1468,21 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
struct anv_state *bt_state)
{
struct anv_subpass *subpass = cmd_buffer->state.subpass;
+ struct anv_cmd_pipeline_state *pipe_state;
struct anv_pipeline *pipeline;
uint32_t bias, state_offset;

switch (stage) {
case MESA_SHADER_COMPUTE:
- pipeline = cmd_buffer->state.compute_pipeline;
+ pipe_state = &cmd_buffer->state.compute.base;
bias = 1;
break;
default:
- pipeline = cmd_buffer->state.pipeline;
+ pipe_state = &cmd_buffer->state.gfx.base;
bias = 0;
break;
}
+ pipeline = pipe_state->pipeline;

if (!anv_pipeline_has_stage(pipeline, stage)) {
*bt_state = (struct anv_state) { 0, };
@@ -1696,12 +1699,10 @@ emit_samplers(struct anv_cmd_buffer *cmd_buffer,
gl_shader_stage stage,
struct anv_state *state)
{
- struct anv_pipeline *pipeline;
-
- if (stage == MESA_SHADER_COMPUTE)
- pipeline = cmd_buffer->state.compute_pipeline;
- else
- pipeline = cmd_buffer->state.pipeline;
+ struct anv_cmd_pipeline_state *pipe_state =
+ stage == MESA_SHADER_COMPUTE ? &cmd_buffer->state.compute.base :
+ &cmd_buffer->state.gfx.base;
+ struct anv_pipeline *pipeline = pipe_state->pipeline;

if (!anv_pipeline_has_stage(pipeline, stage)) {
*state = (struct anv_state) { 0, };
@@ -1751,8 +1752,10 @@ emit_samplers(struct anv_cmd_buffer *cmd_buffer,
static uint32_t
flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer)
{
+ struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;
+
VkShaderStageFlags dirty = cmd_buffer->state.descriptors_dirty &
- cmd_buffer->state.pipeline->active_stages;
+ pipeline->active_stages;

VkResult result = VK_SUCCESS;
anv_foreach_stage(s, dirty) {
@@ -1778,7 +1781,7 @@ flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer)
genX(cmd_buffer_emit_state_base_address)(cmd_buffer);

/* Re-emit all active binding tables */
- dirty |= cmd_buffer->state.pipeline->active_stages;
+ dirty |= pipeline->active_stages;
anv_foreach_stage(s, dirty) {
result = emit_samplers(cmd_buffer, s, &cmd_buffer->state.samplers[s]);
if (result != VK_SUCCESS) {
@@ -1847,7 +1850,7 @@ static void
cmd_buffer_flush_push_constants(struct anv_cmd_buffer *cmd_buffer,
VkShaderStageFlags dirty_stages)
{
- const struct anv_pipeline *pipeline = cmd_buffer->state.pipeline;
+ const struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;

static const uint32_t push_constant_opcodes[] = {
[MESA_SHADER_VERTEX] = 21,
@@ -1976,7 +1979,7 @@ cmd_buffer_flush_push_constants(struct anv_cmd_buffer *cmd_buffer,
void
genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer)
{
- struct anv_pipeline *pipeline = cmd_buffer->state.pipeline;
+ struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;
uint32_t *p;

uint32_t vb_emit = cmd_buffer->state.vb_dirty & pipeline->vb_used;
@@ -2183,7 +2186,7 @@ void genX(CmdDraw)(
uint32_t firstInstance)
{
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
- struct anv_pipeline *pipeline = cmd_buffer->state.pipeline;
+ struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;
const struct brw_vs_prog_data *vs_prog_data = get_vs_prog_data(pipeline);

if (anv_batch_has_error(&cmd_buffer->batch))
@@ -2221,7 +2224,7 @@ void genX(CmdDrawIndexed)(
uint32_t firstInstance)
{
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
- struct anv_pipeline *pipeline = cmd_buffer->state.pipeline;
+ struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;
const struct brw_vs_prog_data *vs_prog_data = get_vs_prog_data(pipeline);

if (anv_batch_has_error(&cmd_buffer->batch))
@@ -2373,7 +2376,7 @@ void genX(CmdDrawIndirect)(
{
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
ANV_FROM_HANDLE(anv_buffer, buffer, _buffer);
- struct anv_pipeline *pipeline = cmd_buffer->state.pipeline;
+ struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;
const struct brw_vs_prog_data *vs_prog_data = get_vs_prog_data(pipeline);

if (anv_batch_has_error(&cmd_buffer->batch))
@@ -2411,7 +2414,7 @@ void genX(CmdDrawIndexedIndirect)(
{
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
ANV_FROM_HANDLE(anv_buffer, buffer, _buffer);
- struct anv_pipeline *pipeline = cmd_buffer->state.pipeline;
+ struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;
const struct brw_vs_prog_data *vs_prog_data = get_vs_prog_data(pipeline);

if (anv_batch_has_error(&cmd_buffer->batch))
@@ -2444,7 +2447,7 @@ void genX(CmdDrawIndexedIndirect)(
static VkResult
flush_compute_descriptor_set(struct anv_cmd_buffer *cmd_buffer)
{
- struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline;
+ struct anv_pipeline *pipeline = cmd_buffer->state.compute.base.pipeline;
struct anv_state surfaces = { 0, }, samplers = { 0, };
VkResult result;

@@ -2500,7 +2503,7 @@ flush_compute_descriptor_set(struct anv_cmd_buffer *cmd_buffer)
void
genX(cmd_buffer_flush_compute_state)(struct anv_cmd_buffer *cmd_buffer)
{
- struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline;
+ struct anv_pipeline *pipeline = cmd_buffer->state.compute.base.pipeline;
MAYBE_UNUSED VkResult result;

assert(pipeline->active_stages == VK_SHADER_STAGE_COMPUTE_BIT);
@@ -2577,7 +2580,7 @@ void genX(CmdDispatch)(
uint32_t z)
{
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
- struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline;
+ struct anv_pipeline *pipeline = cmd_buffer->state.compute.base.pipeline;
const struct brw_cs_prog_data *prog_data = get_cs_prog_data(pipeline);

if (anv_batch_has_error(&cmd_buffer->batch))
@@ -2624,7 +2627,7 @@ void genX(CmdDispatchIndirect)(
{
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
ANV_FROM_HANDLE(anv_buffer, buffer, _buffer);
- struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline;
+ struct anv_pipeline *pipeline = cmd_buffer->state.compute.base.pipeline;
const struct brw_cs_prog_data *prog_data = get_cs_prog_data(pipeline);
struct anv_bo *bo = buffer->bo;
uint32_t bo_offset = buffer->offset + offset;
--
2.5.0.400.gff86faf
Jason Ekstrand
2017-12-16 01:09:03 UTC
Permalink
Raw Message
There are several places where we'd already saved the pipeline off to a
temporary variable but, due to an artifact of history, weren't actually
using that temporary everywhere. No functional change.
---
src/intel/vulkan/gen8_cmd_buffer.c | 3 +--
src/intel/vulkan/genX_cmd_buffer.c | 9 ++++-----
2 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/src/intel/vulkan/gen8_cmd_buffer.c b/src/intel/vulkan/gen8_cmd_buffer.c
index 751212b..687de41 100644
--- a/src/intel/vulkan/gen8_cmd_buffer.c
+++ b/src/intel/vulkan/gen8_cmd_buffer.c
@@ -399,8 +399,7 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
sf.LineWidth = cmd_buffer->state.dynamic.line_width,
#endif
GENX(3DSTATE_SF_pack)(NULL, sf_dw, &sf);
- anv_batch_emit_merge(&cmd_buffer->batch, sf_dw,
- cmd_buffer->state.pipeline->gen8.sf);
+ anv_batch_emit_merge(&cmd_buffer->batch, sf_dw, pipeline->gen8.sf);
}

if (cmd_buffer->state.dirty & (ANV_CMD_DIRTY_PIPELINE |
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index 0bd3874..9a5e750 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -1501,7 +1501,7 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
return VK_ERROR_OUT_OF_DEVICE_MEMORY;

if (stage == MESA_SHADER_COMPUTE &&
- get_cs_prog_data(cmd_buffer->state.compute_pipeline)->uses_num_work_groups) {
+ get_cs_prog_data(pipeline)->uses_num_work_groups) {
struct anv_bo *bo = cmd_buffer->state.num_workgroups_bo;
uint32_t bo_offset = cmd_buffer->state.num_workgroups_offset;

@@ -1847,7 +1847,7 @@ static void
cmd_buffer_flush_push_constants(struct anv_cmd_buffer *cmd_buffer,
VkShaderStageFlags dirty_stages)
{
- UNUSED const struct anv_pipeline *pipeline = cmd_buffer->state.pipeline;
+ const struct anv_pipeline *pipeline = cmd_buffer->state.pipeline;

static const uint32_t push_constant_opcodes[] = {
[MESA_SHADER_VERTEX] = 21,
@@ -1867,7 +1867,7 @@ cmd_buffer_flush_push_constants(struct anv_cmd_buffer *cmd_buffer,
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CONSTANT_VS), c) {
c._3DCommandSubOpcode = push_constant_opcodes[stage];

- if (anv_pipeline_has_stage(cmd_buffer->state.pipeline, stage)) {
+ if (anv_pipeline_has_stage(pipeline, stage)) {
#if GEN_GEN >= 8 || GEN_IS_HASWELL
const struct brw_stage_prog_data *prog_data =
pipeline->shaders[stage]->prog_data;
@@ -2038,8 +2038,7 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer)
/* The exact descriptor layout is pulled from the pipeline, so we need
* to re-emit binding tables on every pipeline change.
*/
- cmd_buffer->state.descriptors_dirty |=
- cmd_buffer->state.pipeline->active_stages;
+ cmd_buffer->state.descriptors_dirty |= pipeline->active_stages;

/* If the pipeline changed, we may need to re-allocate push constant
* space in the URB.
--
2.5.0.400.gff86faf
Jason Ekstrand
2017-12-16 01:09:06 UTC
Permalink
Raw Message
It's now a function which returns the push descriptor set. Since we set
the error on the command buffer, returning the error is a little
redundant. Returning the descriptor set (or NULL on error) is more
convenient.
---
src/intel/vulkan/anv_cmd_buffer.c | 24 +++++++++++++-----------
1 file changed, 13 insertions(+), 11 deletions(-)

diff --git a/src/intel/vulkan/anv_cmd_buffer.c b/src/intel/vulkan/anv_cmd_buffer.c
index dd50563..e5366fd 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -835,9 +835,9 @@ anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer)
return iview;
}

-static VkResult
-anv_cmd_buffer_ensure_push_descriptor_set(struct anv_cmd_buffer *cmd_buffer,
- uint32_t set)
+static struct anv_push_descriptor_set *
+anv_cmd_buffer_get_push_descriptor_set(struct anv_cmd_buffer *cmd_buffer,
+ uint32_t set)
{
struct anv_push_descriptor_set **push_set =
&cmd_buffer->state.push_descriptors[set];
@@ -848,11 +848,11 @@ anv_cmd_buffer_ensure_push_descriptor_set(struct anv_cmd_buffer *cmd_buffer,
VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
if (*push_set == NULL) {
anv_batch_set_error(&cmd_buffer->batch, VK_ERROR_OUT_OF_HOST_MEMORY);
- return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
+ return NULL;
}
}

- return VK_SUCCESS;
+ return *push_set;
}

void anv_CmdPushDescriptorSetKHR(
@@ -873,10 +873,11 @@ void anv_CmdPushDescriptorSetKHR(
const struct anv_descriptor_set_layout *set_layout =
layout->set[_set].layout;

- if (anv_cmd_buffer_ensure_push_descriptor_set(cmd_buffer, _set) != VK_SUCCESS)
- return;
struct anv_push_descriptor_set *push_set =
- cmd_buffer->state.push_descriptors[_set];
+ anv_cmd_buffer_get_push_descriptor_set(cmd_buffer, _set);
+ if (!push_set)
+ return;
+
struct anv_descriptor_set *set = &push_set->set;

set->layout = set_layout;
@@ -964,10 +965,11 @@ void anv_CmdPushDescriptorSetWithTemplateKHR(
const struct anv_descriptor_set_layout *set_layout =
layout->set[_set].layout;

- if (anv_cmd_buffer_ensure_push_descriptor_set(cmd_buffer, _set) != VK_SUCCESS)
- return;
struct anv_push_descriptor_set *push_set =
- cmd_buffer->state.push_descriptors[_set];
+ anv_cmd_buffer_get_push_descriptor_set(cmd_buffer, _set);
+ if (!push_set)
+ return;
+
struct anv_descriptor_set *set = &push_set->set;

set->layout = set_layout;
--
2.5.0.400.gff86faf
Jason Ekstrand
2017-12-16 01:09:07 UTC
Permalink
Raw Message
This lets us unify some code between push descriptors and regular
descriptors. It doesn't do much for us yet but it will.
---
src/intel/vulkan/anv_cmd_buffer.c | 70 +++++++++++++++++++++++----------------
1 file changed, 42 insertions(+), 28 deletions(-)

diff --git a/src/intel/vulkan/anv_cmd_buffer.c b/src/intel/vulkan/anv_cmd_buffer.c
index e5366fd..636f515 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -493,6 +493,40 @@ void anv_CmdSetStencilReference(
cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
}

+static void
+anv_cmd_buffer_bind_descriptor_set(struct anv_cmd_buffer *cmd_buffer,
+ struct anv_pipeline_layout *layout,
+ uint32_t set_index,
+ struct anv_descriptor_set *set,
+ uint32_t *dynamic_offset_count,
+ const uint32_t **dynamic_offsets)
+{
+ struct anv_descriptor_set_layout *set_layout =
+ layout->set[set_index].layout;
+
+ cmd_buffer->state.descriptors[set_index] = set;
+
+ if (dynamic_offsets) {
+ if (set_layout->dynamic_offset_count > 0) {
+ uint32_t dynamic_offset_start =
+ layout->set[set_index].dynamic_offset_start;
+
+ /* Assert that everything is in range */
+ assert(set_layout->dynamic_offset_count <= *dynamic_offset_count);
+ assert(dynamic_offset_start + set_layout->dynamic_offset_count <=
+ ARRAY_SIZE(cmd_buffer->state.dynamic_offsets));
+
+ typed_memcpy(&cmd_buffer->state.dynamic_offsets[dynamic_offset_start],
+ *dynamic_offsets, set_layout->dynamic_offset_count);
+
+ *dynamic_offsets += set_layout->dynamic_offset_count;
+ *dynamic_offset_count -= set_layout->dynamic_offset_count;
+ }
+ }
+
+ cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
+}
+
void anv_CmdBindDescriptorSets(
VkCommandBuffer commandBuffer,
VkPipelineBindPoint pipelineBindPoint,
@@ -505,35 +539,15 @@ void anv_CmdBindDescriptorSets(
{
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
- struct anv_descriptor_set_layout *set_layout;

assert(firstSet + descriptorSetCount < MAX_SETS);

- uint32_t dynamic_slot = 0;
for (uint32_t i = 0; i < descriptorSetCount; i++) {
ANV_FROM_HANDLE(anv_descriptor_set, set, pDescriptorSets[i]);
- set_layout = layout->set[firstSet + i].layout;
-
- cmd_buffer->state.descriptors[firstSet + i] = set;
-
- if (set_layout->dynamic_offset_count > 0) {
- uint32_t dynamic_offset_start =
- layout->set[firstSet + i].dynamic_offset_start;
-
- /* Assert that everything is in range */
- assert(dynamic_offset_start + set_layout->dynamic_offset_count <=
- ARRAY_SIZE(cmd_buffer->state.dynamic_offsets));
- assert(dynamic_slot + set_layout->dynamic_offset_count <=
- dynamicOffsetCount);
-
- typed_memcpy(&cmd_buffer->state.dynamic_offsets[dynamic_offset_start],
- &pDynamicOffsets[dynamic_slot],
- set_layout->dynamic_offset_count);
-
- dynamic_slot += set_layout->dynamic_offset_count;
- }
-
- cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
+ anv_cmd_buffer_bind_descriptor_set(cmd_buffer, layout,
+ firstSet + i, set,
+ &dynamicOffsetCount,
+ &pDynamicOffsets);
}
}

@@ -944,8 +958,8 @@ void anv_CmdPushDescriptorSetKHR(
}
}

- cmd_buffer->state.descriptors[_set] = set;
- cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
+ anv_cmd_buffer_bind_descriptor_set(cmd_buffer, layout, _set,
+ set, NULL, NULL);
}

void anv_CmdPushDescriptorSetWithTemplateKHR(
@@ -983,6 +997,6 @@ void anv_CmdPushDescriptorSetWithTemplateKHR(
template,
pData);

- cmd_buffer->state.descriptors[_set] = set;
- cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
+ anv_cmd_buffer_bind_descriptor_set(cmd_buffer, layout, _set,
+ set, NULL, NULL);
}
--
2.5.0.400.gff86faf
Jason Ekstrand
2017-12-16 01:09:05 UTC
Permalink
Raw Message
With the semicolons, they can't be used in a function argument without
throwing syntax errors.
---
src/intel/vulkan/anv_private.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 9860778..e8d0d27 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -312,10 +312,10 @@ VkResult __vk_errorf(struct anv_instance *instance, const void *object,
#ifdef DEBUG
#define vk_error(error) __vk_errorf(NULL, NULL,\
VK_DEBUG_REPORT_OBJECT_TYPE_UNKNOWN_EXT,\
- error, __FILE__, __LINE__, NULL);
+ error, __FILE__, __LINE__, NULL)
#define vk_errorf(instance, obj, error, format, ...)\
__vk_errorf(instance, obj, REPORT_OBJECT_TYPE(obj), error,\
- __FILE__, __LINE__, format, ## __VA_ARGS__);
+ __FILE__, __LINE__, format, ## __VA_ARGS__)
#else
#define vk_error(error) error
#define vk_errorf(instance, obj, error, format, ...) error
--
2.5.0.400.gff86faf
Jason Ekstrand
2017-12-16 01:09:09 UTC
Permalink
Raw Message
The Vulkan spec says:

"pipelineBindPoint is a VkPipelineBindPoint indicating whether the
descriptors will be used by graphics pipelines or compute pipelines.
There is a separate set of bind points for each of graphics and
compute, so binding one does not disturb the other."

Up until now, we've been ignoring the pipeline bind point and had just
one bind point for everything. This commit separates things out into
separate bind points.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102897
---
src/intel/vulkan/anv_cmd_buffer.c | 65 ++++++++++++++++++++++++++---------
src/intel/vulkan/anv_descriptor_set.c | 2 ++
src/intel/vulkan/anv_private.h | 11 +++---
src/intel/vulkan/genX_cmd_buffer.c | 24 +++++++------
4 files changed, 70 insertions(+), 32 deletions(-)

diff --git a/src/intel/vulkan/anv_cmd_buffer.c b/src/intel/vulkan/anv_cmd_buffer.c
index 636f515..9720e7e 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -124,12 +124,20 @@ anv_cmd_state_init(struct anv_cmd_buffer *cmd_buffer)
}

static void
+anv_cmd_pipeline_state_finish(struct anv_cmd_buffer *cmd_buffer,
+ struct anv_cmd_pipeline_state *pipe_state)
+{
+ for (uint32_t i = 0; i < ARRAY_SIZE(pipe_state->push_descriptors); i++)
+ vk_free(&cmd_buffer->pool->alloc, pipe_state->push_descriptors[i]);
+}
+
+static void
anv_cmd_state_finish(struct anv_cmd_buffer *cmd_buffer)
{
struct anv_cmd_state *state = &cmd_buffer->state;

- for (uint32_t i = 0; i < ARRAY_SIZE(state->push_descriptors); i++)
- vk_free(&cmd_buffer->pool->alloc, state->push_descriptors[i]);
+ anv_cmd_pipeline_state_finish(cmd_buffer, &state->gfx.base);
+ anv_cmd_pipeline_state_finish(cmd_buffer, &state->compute.base);

for (uint32_t i = 0; i < MESA_SHADER_STAGES; i++)
vk_free(&cmd_buffer->pool->alloc, state->push_constants[i]);
@@ -495,6 +503,7 @@ void anv_CmdSetStencilReference(

static void
anv_cmd_buffer_bind_descriptor_set(struct anv_cmd_buffer *cmd_buffer,
+ VkPipelineBindPoint bind_point,
struct anv_pipeline_layout *layout,
uint32_t set_index,
struct anv_descriptor_set *set,
@@ -504,7 +513,14 @@ anv_cmd_buffer_bind_descriptor_set(struct anv_cmd_buffer *cmd_buffer,
struct anv_descriptor_set_layout *set_layout =
layout->set[set_index].layout;

- cmd_buffer->state.descriptors[set_index] = set;
+ struct anv_cmd_pipeline_state *pipe_state;
+ if (bind_point == VK_PIPELINE_BIND_POINT_COMPUTE) {
+ pipe_state = &cmd_buffer->state.compute.base;
+ } else {
+ assert(bind_point == VK_PIPELINE_BIND_POINT_GRAPHICS);
+ pipe_state = &cmd_buffer->state.gfx.base;
+ }
+ pipe_state->descriptors[set_index] = set;

if (dynamic_offsets) {
if (set_layout->dynamic_offset_count > 0) {
@@ -514,9 +530,9 @@ anv_cmd_buffer_bind_descriptor_set(struct anv_cmd_buffer *cmd_buffer,
/* Assert that everything is in range */
assert(set_layout->dynamic_offset_count <= *dynamic_offset_count);
assert(dynamic_offset_start + set_layout->dynamic_offset_count <=
- ARRAY_SIZE(cmd_buffer->state.dynamic_offsets));
+ ARRAY_SIZE(pipe_state->dynamic_offsets));

- typed_memcpy(&cmd_buffer->state.dynamic_offsets[dynamic_offset_start],
+ typed_memcpy(&pipe_state->dynamic_offsets[dynamic_offset_start],
*dynamic_offsets, set_layout->dynamic_offset_count);

*dynamic_offsets += set_layout->dynamic_offset_count;
@@ -524,7 +540,13 @@ anv_cmd_buffer_bind_descriptor_set(struct anv_cmd_buffer *cmd_buffer,
}
}

- cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
+ if (bind_point == VK_PIPELINE_BIND_POINT_COMPUTE) {
+ cmd_buffer->state.descriptors_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
+ } else {
+ assert(bind_point == VK_PIPELINE_BIND_POINT_GRAPHICS);
+ cmd_buffer->state.descriptors_dirty |=
+ set_layout->shader_stages & VK_SHADER_STAGE_ALL_GRAPHICS;
+ }
}

void anv_CmdBindDescriptorSets(
@@ -544,8 +566,8 @@ void anv_CmdBindDescriptorSets(

for (uint32_t i = 0; i < descriptorSetCount; i++) {
ANV_FROM_HANDLE(anv_descriptor_set, set, pDescriptorSets[i]);
- anv_cmd_buffer_bind_descriptor_set(cmd_buffer, layout,
- firstSet + i, set,
+ anv_cmd_buffer_bind_descriptor_set(cmd_buffer, pipelineBindPoint,
+ layout, firstSet + i, set,
&dynamicOffsetCount,
&pDynamicOffsets);
}
@@ -851,10 +873,19 @@ anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer)

static struct anv_push_descriptor_set *
anv_cmd_buffer_get_push_descriptor_set(struct anv_cmd_buffer *cmd_buffer,
+ VkPipelineBindPoint bind_point,
uint32_t set)
{
+ struct anv_cmd_pipeline_state *pipe_state;
+ if (bind_point == VK_PIPELINE_BIND_POINT_COMPUTE) {
+ pipe_state = &cmd_buffer->state.compute.base;
+ } else {
+ assert(bind_point == VK_PIPELINE_BIND_POINT_GRAPHICS);
+ pipe_state = &cmd_buffer->state.gfx.base;
+ }
+
struct anv_push_descriptor_set **push_set =
- &cmd_buffer->state.push_descriptors[set];
+ &pipe_state->push_descriptors[set];

if (*push_set == NULL) {
*push_set = vk_alloc(&cmd_buffer->pool->alloc,
@@ -880,15 +911,14 @@ void anv_CmdPushDescriptorSetKHR(
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);

- assert(pipelineBindPoint == VK_PIPELINE_BIND_POINT_GRAPHICS ||
- pipelineBindPoint == VK_PIPELINE_BIND_POINT_COMPUTE);
assert(_set < MAX_SETS);

const struct anv_descriptor_set_layout *set_layout =
layout->set[_set].layout;

struct anv_push_descriptor_set *push_set =
- anv_cmd_buffer_get_push_descriptor_set(cmd_buffer, _set);
+ anv_cmd_buffer_get_push_descriptor_set(cmd_buffer,
+ pipelineBindPoint, _set);
if (!push_set)
return;

@@ -958,8 +988,8 @@ void anv_CmdPushDescriptorSetKHR(
}
}

- anv_cmd_buffer_bind_descriptor_set(cmd_buffer, layout, _set,
- set, NULL, NULL);
+ anv_cmd_buffer_bind_descriptor_set(cmd_buffer, pipelineBindPoint,
+ layout, _set, set, NULL, NULL);
}

void anv_CmdPushDescriptorSetWithTemplateKHR(
@@ -980,7 +1010,8 @@ void anv_CmdPushDescriptorSetWithTemplateKHR(
layout->set[_set].layout;

struct anv_push_descriptor_set *push_set =
- anv_cmd_buffer_get_push_descriptor_set(cmd_buffer, _set);
+ anv_cmd_buffer_get_push_descriptor_set(cmd_buffer,
+ template->bind_point, _set);
if (!push_set)
return;

@@ -997,6 +1028,6 @@ void anv_CmdPushDescriptorSetWithTemplateKHR(
template,
pData);

- anv_cmd_buffer_bind_descriptor_set(cmd_buffer, layout, _set,
- set, NULL, NULL);
+ anv_cmd_buffer_bind_descriptor_set(cmd_buffer, template->bind_point,
+ layout, _set, set, NULL, NULL);
}
diff --git a/src/intel/vulkan/anv_descriptor_set.c b/src/intel/vulkan/anv_descriptor_set.c
index 629c041..63557ab 100644
--- a/src/intel/vulkan/anv_descriptor_set.c
+++ b/src/intel/vulkan/anv_descriptor_set.c
@@ -891,6 +891,8 @@ VkResult anv_CreateDescriptorUpdateTemplateKHR(
if (template == NULL)
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);

+ template->bind_point = pCreateInfo->pipelineBindPoint;
+
if (pCreateInfo->templateType == VK_DESCRIPTOR_UPDATE_TEMPLATE_TYPE_DESCRIPTOR_SET_KHR)
template->set = pCreateInfo->set;

diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index e8d0d27..f1868a3 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1319,6 +1319,8 @@ struct anv_descriptor_template_entry {
};

struct anv_descriptor_update_template {
+ VkPipelineBindPoint bind_point;
+
/* The descriptor set this template corresponds to. This value is only
* valid if the template was created with the templateType
* VK_DESCRIPTOR_UPDATE_TEMPLATE_TYPE_DESCRIPTOR_SET_KHR.
@@ -1686,6 +1688,11 @@ struct anv_attachment_state {
*/
struct anv_cmd_pipeline_state {
struct anv_pipeline *pipeline;
+
+ struct anv_descriptor_set *descriptors[MAX_SETS];
+ uint32_t dynamic_offsets[MAX_DYNAMIC_BUFFERS];
+
+ struct anv_push_descriptor_set *push_descriptors[MAX_SETS];
};

/** State tracking for graphics pipeline
@@ -1734,16 +1741,12 @@ struct anv_cmd_state {
VkRect2D render_area;
uint32_t restart_index;
struct anv_vertex_binding vertex_bindings[MAX_VBS];
- struct anv_descriptor_set * descriptors[MAX_SETS];
- uint32_t dynamic_offsets[MAX_DYNAMIC_BUFFERS];
VkShaderStageFlags push_constant_stages;
struct anv_push_constants * push_constants[MESA_SHADER_STAGES];
struct anv_state binding_tables[MESA_SHADER_STAGES];
struct anv_state samplers[MESA_SHADER_STAGES];
struct anv_dynamic_state dynamic;

- struct anv_push_descriptor_set * push_descriptors[MAX_SETS];
-
/**
* Whether or not the gen8 PMA fix is enabled. We ensure that, at the top
* of any command buffer it is disabled by disabling it in EndCommandBuffer
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index 994c996..75aa40a 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -1434,32 +1434,32 @@ cmd_buffer_alloc_push_constants(struct anv_cmd_buffer *cmd_buffer)
}

static const struct anv_descriptor *
-anv_descriptor_for_binding(const struct anv_cmd_buffer *cmd_buffer,
+anv_descriptor_for_binding(const struct anv_cmd_pipeline_state *pipe_state,
const struct anv_pipeline_binding *binding)
{
assert(binding->set < MAX_SETS);
const struct anv_descriptor_set *set =
- cmd_buffer->state.descriptors[binding->set];
+ pipe_state->descriptors[binding->set];
const uint32_t offset =
set->layout->binding[binding->binding].descriptor_index;
return &set->descriptors[offset + binding->index];
}

static uint32_t
-dynamic_offset_for_binding(const struct anv_cmd_buffer *cmd_buffer,
+dynamic_offset_for_binding(const struct anv_cmd_pipeline_state *pipe_state,
const struct anv_pipeline *pipeline,
const struct anv_pipeline_binding *binding)
{
assert(binding->set < MAX_SETS);
const struct anv_descriptor_set *set =
- cmd_buffer->state.descriptors[binding->set];
+ pipe_state->descriptors[binding->set];

uint32_t dynamic_offset_idx =
pipeline->layout->set[binding->set].dynamic_offset_start +
set->layout->binding[binding->binding].dynamic_offset_index +
binding->index;

- return cmd_buffer->state.dynamic_offsets[dynamic_offset_idx];
+ return pipe_state->dynamic_offsets[dynamic_offset_idx];
}

static VkResult
@@ -1567,7 +1567,7 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
}

const struct anv_descriptor *desc =
- anv_descriptor_for_binding(cmd_buffer, binding);
+ anv_descriptor_for_binding(pipe_state, binding);

switch (desc->type) {
case VK_DESCRIPTOR_TYPE_SAMPLER:
@@ -1643,7 +1643,7 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC: {
/* Compute the offset within the buffer */
uint32_t dynamic_offset =
- dynamic_offset_for_binding(cmd_buffer, pipeline, binding);
+ dynamic_offset_for_binding(pipe_state, pipeline, binding);
uint64_t offset = desc->offset + dynamic_offset;
/* Clamp to the buffer size */
offset = MIN2(offset, desc->buffer->size);
@@ -1724,7 +1724,7 @@ emit_samplers(struct anv_cmd_buffer *cmd_buffer,
for (uint32_t s = 0; s < map->sampler_count; s++) {
struct anv_pipeline_binding *binding = &map->sampler_to_descriptor[s];
const struct anv_descriptor *desc =
- anv_descriptor_for_binding(cmd_buffer, binding);
+ anv_descriptor_for_binding(pipe_state, binding);

if (desc->type != VK_DESCRIPTOR_TYPE_SAMPLER &&
desc->type != VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER)
@@ -1848,7 +1848,8 @@ static void
cmd_buffer_flush_push_constants(struct anv_cmd_buffer *cmd_buffer,
VkShaderStageFlags dirty_stages)
{
- const struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;
+ const struct anv_cmd_graphics_state *gfx_state = &cmd_buffer->state.gfx;
+ const struct anv_pipeline *pipeline = gfx_state->base.pipeline;

static const uint32_t push_constant_opcodes[] = {
[MESA_SHADER_VERTEX] = 21,
@@ -1901,7 +1902,7 @@ cmd_buffer_flush_push_constants(struct anv_cmd_buffer *cmd_buffer,
&bind_map->surface_to_descriptor[surface];

const struct anv_descriptor *desc =
- anv_descriptor_for_binding(cmd_buffer, binding);
+ anv_descriptor_for_binding(&gfx_state->base, binding);

struct anv_address read_addr;
uint32_t read_len;
@@ -1917,7 +1918,8 @@ cmd_buffer_flush_push_constants(struct anv_cmd_buffer *cmd_buffer,
assert(desc->type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC);

uint32_t dynamic_offset =
- dynamic_offset_for_binding(cmd_buffer, pipeline, binding);
+ dynamic_offset_for_binding(&gfx_state->base,
+ pipeline, binding);
uint32_t buf_offset =
MIN2(desc->offset + dynamic_offset, desc->buffer->size);
uint32_t buf_range =
--
2.5.0.400.gff86faf
Pohjolainen, Topi
2018-01-15 15:11:00 UTC
Permalink
Raw Message
Post by Jason Ekstrand
"pipelineBindPoint is a VkPipelineBindPoint indicating whether the
descriptors will be used by graphics pipelines or compute pipelines.
There is a separate set of bind points for each of graphics and
compute, so binding one does not disturb the other."
Up until now, we've been ignoring the pipeline bind point and had just
one bind point for everything. This commit separates things out into
separate bind points.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102897
---
src/intel/vulkan/anv_cmd_buffer.c | 65 ++++++++++++++++++++++++++---------
src/intel/vulkan/anv_descriptor_set.c | 2 ++
src/intel/vulkan/anv_private.h | 11 +++---
src/intel/vulkan/genX_cmd_buffer.c | 24 +++++++------
4 files changed, 70 insertions(+), 32 deletions(-)
diff --git a/src/intel/vulkan/anv_cmd_buffer.c b/src/intel/vulkan/anv_cmd_buffer.c
index 636f515..9720e7e 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -124,12 +124,20 @@ anv_cmd_state_init(struct anv_cmd_buffer *cmd_buffer)
}
static void
+anv_cmd_pipeline_state_finish(struct anv_cmd_buffer *cmd_buffer,
+ struct anv_cmd_pipeline_state *pipe_state)
+{
+ for (uint32_t i = 0; i < ARRAY_SIZE(pipe_state->push_descriptors); i++)
+ vk_free(&cmd_buffer->pool->alloc, pipe_state->push_descriptors[i]);
+}
+
+static void
anv_cmd_state_finish(struct anv_cmd_buffer *cmd_buffer)
{
struct anv_cmd_state *state = &cmd_buffer->state;
- for (uint32_t i = 0; i < ARRAY_SIZE(state->push_descriptors); i++)
- vk_free(&cmd_buffer->pool->alloc, state->push_descriptors[i]);
+ anv_cmd_pipeline_state_finish(cmd_buffer, &state->gfx.base);
+ anv_cmd_pipeline_state_finish(cmd_buffer, &state->compute.base);
for (uint32_t i = 0; i < MESA_SHADER_STAGES; i++)
vk_free(&cmd_buffer->pool->alloc, state->push_constants[i]);
@@ -495,6 +503,7 @@ void anv_CmdSetStencilReference(
static void
anv_cmd_buffer_bind_descriptor_set(struct anv_cmd_buffer *cmd_buffer,
+ VkPipelineBindPoint bind_point,
struct anv_pipeline_layout *layout,
uint32_t set_index,
struct anv_descriptor_set *set,
@@ -504,7 +513,14 @@ anv_cmd_buffer_bind_descriptor_set(struct anv_cmd_buffer *cmd_buffer,
struct anv_descriptor_set_layout *set_layout =
layout->set[set_index].layout;
- cmd_buffer->state.descriptors[set_index] = set;
+ struct anv_cmd_pipeline_state *pipe_state;
+ if (bind_point == VK_PIPELINE_BIND_POINT_COMPUTE) {
+ pipe_state = &cmd_buffer->state.compute.base;
+ } else {
+ assert(bind_point == VK_PIPELINE_BIND_POINT_GRAPHICS);
+ pipe_state = &cmd_buffer->state.gfx.base;
+ }
+ pipe_state->descriptors[set_index] = set;
if (dynamic_offsets) {
if (set_layout->dynamic_offset_count > 0) {
@@ -514,9 +530,9 @@ anv_cmd_buffer_bind_descriptor_set(struct anv_cmd_buffer *cmd_buffer,
/* Assert that everything is in range */
assert(set_layout->dynamic_offset_count <= *dynamic_offset_count);
assert(dynamic_offset_start + set_layout->dynamic_offset_count <=
- ARRAY_SIZE(cmd_buffer->state.dynamic_offsets));
+ ARRAY_SIZE(pipe_state->dynamic_offsets));
- typed_memcpy(&cmd_buffer->state.dynamic_offsets[dynamic_offset_start],
+ typed_memcpy(&pipe_state->dynamic_offsets[dynamic_offset_start],
*dynamic_offsets, set_layout->dynamic_offset_count);
*dynamic_offsets += set_layout->dynamic_offset_count;
@@ -524,7 +540,13 @@ anv_cmd_buffer_bind_descriptor_set(struct anv_cmd_buffer *cmd_buffer,
}
}
- cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
+ if (bind_point == VK_PIPELINE_BIND_POINT_COMPUTE) {
+ cmd_buffer->state.descriptors_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
+ } else {
+ assert(bind_point == VK_PIPELINE_BIND_POINT_GRAPHICS);
+ cmd_buffer->state.descriptors_dirty |=
+ set_layout->shader_stages & VK_SHADER_STAGE_ALL_GRAPHICS;
Should we put () around the right hand side? We seem to be using that
elsewhere.
Post by Jason Ekstrand
+ }
}
void anv_CmdBindDescriptorSets(
@@ -544,8 +566,8 @@ void anv_CmdBindDescriptorSets(
for (uint32_t i = 0; i < descriptorSetCount; i++) {
ANV_FROM_HANDLE(anv_descriptor_set, set, pDescriptorSets[i]);
- anv_cmd_buffer_bind_descriptor_set(cmd_buffer, layout,
- firstSet + i, set,
+ anv_cmd_buffer_bind_descriptor_set(cmd_buffer, pipelineBindPoint,
+ layout, firstSet + i, set,
&dynamicOffsetCount,
&pDynamicOffsets);
}
@@ -851,10 +873,19 @@ anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer)
static struct anv_push_descriptor_set *
anv_cmd_buffer_get_push_descriptor_set(struct anv_cmd_buffer *cmd_buffer,
+ VkPipelineBindPoint bind_point,
uint32_t set)
{
+ struct anv_cmd_pipeline_state *pipe_state;
+ if (bind_point == VK_PIPELINE_BIND_POINT_COMPUTE) {
+ pipe_state = &cmd_buffer->state.compute.base;
+ } else {
+ assert(bind_point == VK_PIPELINE_BIND_POINT_GRAPHICS);
+ pipe_state = &cmd_buffer->state.gfx.base;
+ }
+
struct anv_push_descriptor_set **push_set =
- &cmd_buffer->state.push_descriptors[set];
+ &pipe_state->push_descriptors[set];
if (*push_set == NULL) {
*push_set = vk_alloc(&cmd_buffer->pool->alloc,
@@ -880,15 +911,14 @@ void anv_CmdPushDescriptorSetKHR(
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
- assert(pipelineBindPoint == VK_PIPELINE_BIND_POINT_GRAPHICS ||
- pipelineBindPoint == VK_PIPELINE_BIND_POINT_COMPUTE);
assert(_set < MAX_SETS);
const struct anv_descriptor_set_layout *set_layout =
layout->set[_set].layout;
struct anv_push_descriptor_set *push_set =
- anv_cmd_buffer_get_push_descriptor_set(cmd_buffer, _set);
+ anv_cmd_buffer_get_push_descriptor_set(cmd_buffer,
+ pipelineBindPoint, _set);
if (!push_set)
return;
@@ -958,8 +988,8 @@ void anv_CmdPushDescriptorSetKHR(
}
}
- anv_cmd_buffer_bind_descriptor_set(cmd_buffer, layout, _set,
- set, NULL, NULL);
+ anv_cmd_buffer_bind_descriptor_set(cmd_buffer, pipelineBindPoint,
+ layout, _set, set, NULL, NULL);
}
void anv_CmdPushDescriptorSetWithTemplateKHR(
@@ -980,7 +1010,8 @@ void anv_CmdPushDescriptorSetWithTemplateKHR(
layout->set[_set].layout;
struct anv_push_descriptor_set *push_set =
- anv_cmd_buffer_get_push_descriptor_set(cmd_buffer, _set);
+ anv_cmd_buffer_get_push_descriptor_set(cmd_buffer,
+ template->bind_point, _set);
if (!push_set)
return;
@@ -997,6 +1028,6 @@ void anv_CmdPushDescriptorSetWithTemplateKHR(
template,
pData);
- anv_cmd_buffer_bind_descriptor_set(cmd_buffer, layout, _set,
- set, NULL, NULL);
+ anv_cmd_buffer_bind_descriptor_set(cmd_buffer, template->bind_point,
+ layout, _set, set, NULL, NULL);
}
diff --git a/src/intel/vulkan/anv_descriptor_set.c b/src/intel/vulkan/anv_descriptor_set.c
index 629c041..63557ab 100644
--- a/src/intel/vulkan/anv_descriptor_set.c
+++ b/src/intel/vulkan/anv_descriptor_set.c
@@ -891,6 +891,8 @@ VkResult anv_CreateDescriptorUpdateTemplateKHR(
if (template == NULL)
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
+ template->bind_point = pCreateInfo->pipelineBindPoint;
+
if (pCreateInfo->templateType == VK_DESCRIPTOR_UPDATE_TEMPLATE_TYPE_DESCRIPTOR_SET_KHR)
template->set = pCreateInfo->set;
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index e8d0d27..f1868a3 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1319,6 +1319,8 @@ struct anv_descriptor_template_entry {
};
struct anv_descriptor_update_template {
+ VkPipelineBindPoint bind_point;
+
/* The descriptor set this template corresponds to. This value is only
* valid if the template was created with the templateType
* VK_DESCRIPTOR_UPDATE_TEMPLATE_TYPE_DESCRIPTOR_SET_KHR.
@@ -1686,6 +1688,11 @@ struct anv_attachment_state {
*/
struct anv_cmd_pipeline_state {
struct anv_pipeline *pipeline;
+
+ struct anv_descriptor_set *descriptors[MAX_SETS];
+ uint32_t dynamic_offsets[MAX_DYNAMIC_BUFFERS];
+
+ struct anv_push_descriptor_set *push_descriptors[MAX_SETS];
};
/** State tracking for graphics pipeline
@@ -1734,16 +1741,12 @@ struct anv_cmd_state {
VkRect2D render_area;
uint32_t restart_index;
struct anv_vertex_binding vertex_bindings[MAX_VBS];
- struct anv_descriptor_set * descriptors[MAX_SETS];
- uint32_t dynamic_offsets[MAX_DYNAMIC_BUFFERS];
VkShaderStageFlags push_constant_stages;
struct anv_push_constants * push_constants[MESA_SHADER_STAGES];
struct anv_state binding_tables[MESA_SHADER_STAGES];
struct anv_state samplers[MESA_SHADER_STAGES];
struct anv_dynamic_state dynamic;
- struct anv_push_descriptor_set * push_descriptors[MAX_SETS];
-
/**
* Whether or not the gen8 PMA fix is enabled. We ensure that, at the top
* of any command buffer it is disabled by disabling it in EndCommandBuffer
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index 994c996..75aa40a 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -1434,32 +1434,32 @@ cmd_buffer_alloc_push_constants(struct anv_cmd_buffer *cmd_buffer)
}
static const struct anv_descriptor *
-anv_descriptor_for_binding(const struct anv_cmd_buffer *cmd_buffer,
+anv_descriptor_for_binding(const struct anv_cmd_pipeline_state *pipe_state,
const struct anv_pipeline_binding *binding)
{
assert(binding->set < MAX_SETS);
const struct anv_descriptor_set *set =
- cmd_buffer->state.descriptors[binding->set];
+ pipe_state->descriptors[binding->set];
const uint32_t offset =
set->layout->binding[binding->binding].descriptor_index;
return &set->descriptors[offset + binding->index];
}
static uint32_t
-dynamic_offset_for_binding(const struct anv_cmd_buffer *cmd_buffer,
+dynamic_offset_for_binding(const struct anv_cmd_pipeline_state *pipe_state,
const struct anv_pipeline *pipeline,
const struct anv_pipeline_binding *binding)
{
assert(binding->set < MAX_SETS);
const struct anv_descriptor_set *set =
- cmd_buffer->state.descriptors[binding->set];
+ pipe_state->descriptors[binding->set];
uint32_t dynamic_offset_idx =
pipeline->layout->set[binding->set].dynamic_offset_start +
set->layout->binding[binding->binding].dynamic_offset_index +
binding->index;
- return cmd_buffer->state.dynamic_offsets[dynamic_offset_idx];
+ return pipe_state->dynamic_offsets[dynamic_offset_idx];
}
static VkResult
@@ -1567,7 +1567,7 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
}
const struct anv_descriptor *desc =
- anv_descriptor_for_binding(cmd_buffer, binding);
+ anv_descriptor_for_binding(pipe_state, binding);
switch (desc->type) {
@@ -1643,7 +1643,7 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC: {
/* Compute the offset within the buffer */
uint32_t dynamic_offset =
- dynamic_offset_for_binding(cmd_buffer, pipeline, binding);
+ dynamic_offset_for_binding(pipe_state, pipeline, binding);
uint64_t offset = desc->offset + dynamic_offset;
/* Clamp to the buffer size */
offset = MIN2(offset, desc->buffer->size);
@@ -1724,7 +1724,7 @@ emit_samplers(struct anv_cmd_buffer *cmd_buffer,
for (uint32_t s = 0; s < map->sampler_count; s++) {
struct anv_pipeline_binding *binding = &map->sampler_to_descriptor[s];
const struct anv_descriptor *desc =
- anv_descriptor_for_binding(cmd_buffer, binding);
+ anv_descriptor_for_binding(pipe_state, binding);
if (desc->type != VK_DESCRIPTOR_TYPE_SAMPLER &&
desc->type != VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER)
@@ -1848,7 +1848,8 @@ static void
cmd_buffer_flush_push_constants(struct anv_cmd_buffer *cmd_buffer,
VkShaderStageFlags dirty_stages)
{
- const struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;
+ const struct anv_cmd_graphics_state *gfx_state = &cmd_buffer->state.gfx;
+ const struct anv_pipeline *pipeline = gfx_state->base.pipeline;
static const uint32_t push_constant_opcodes[] = {
[MESA_SHADER_VERTEX] = 21,
@@ -1901,7 +1902,7 @@ cmd_buffer_flush_push_constants(struct anv_cmd_buffer *cmd_buffer,
&bind_map->surface_to_descriptor[surface];
const struct anv_descriptor *desc =
- anv_descriptor_for_binding(cmd_buffer, binding);
+ anv_descriptor_for_binding(&gfx_state->base, binding);
struct anv_address read_addr;
uint32_t read_len;
@@ -1917,7 +1918,8 @@ cmd_buffer_flush_push_constants(struct anv_cmd_buffer *cmd_buffer,
assert(desc->type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC);
uint32_t dynamic_offset =
- dynamic_offset_for_binding(cmd_buffer, pipeline, binding);
+ dynamic_offset_for_binding(&gfx_state->base,
+ pipeline, binding);
uint32_t buf_offset =
MIN2(desc->offset + dynamic_offset, desc->buffer->size);
uint32_t buf_range =
--
2.5.0.400.gff86faf
_______________________________________________
mesa-dev mailing list
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Jason Ekstrand
2018-01-15 18:47:08 UTC
Permalink
Raw Message
On Mon, Jan 15, 2018 at 7:11 AM, Pohjolainen, Topi <
Post by Jason Ekstrand
Post by Jason Ekstrand
"pipelineBindPoint is a VkPipelineBindPoint indicating whether the
descriptors will be used by graphics pipelines or compute pipelines.
There is a separate set of bind points for each of graphics and
compute, so binding one does not disturb the other."
Up until now, we've been ignoring the pipeline bind point and had just
one bind point for everything. This commit separates things out into
separate bind points.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102897
---
src/intel/vulkan/anv_cmd_buffer.c | 65
++++++++++++++++++++++++++---------
Post by Jason Ekstrand
src/intel/vulkan/anv_descriptor_set.c | 2 ++
src/intel/vulkan/anv_private.h | 11 +++---
src/intel/vulkan/genX_cmd_buffer.c | 24 +++++++------
4 files changed, 70 insertions(+), 32 deletions(-)
diff --git a/src/intel/vulkan/anv_cmd_buffer.c
b/src/intel/vulkan/anv_cmd_buffer.c
Post by Jason Ekstrand
index 636f515..9720e7e 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -124,12 +124,20 @@ anv_cmd_state_init(struct anv_cmd_buffer
*cmd_buffer)
Post by Jason Ekstrand
}
static void
+anv_cmd_pipeline_state_finish(struct anv_cmd_buffer *cmd_buffer,
+ struct anv_cmd_pipeline_state *pipe_state)
+{
+ for (uint32_t i = 0; i < ARRAY_SIZE(pipe_state->push_descriptors);
i++)
Post by Jason Ekstrand
+ vk_free(&cmd_buffer->pool->alloc, pipe_state->push_descriptors[
i]);
Post by Jason Ekstrand
+}
+
+static void
anv_cmd_state_finish(struct anv_cmd_buffer *cmd_buffer)
{
struct anv_cmd_state *state = &cmd_buffer->state;
- for (uint32_t i = 0; i < ARRAY_SIZE(state->push_descriptors); i++)
- vk_free(&cmd_buffer->pool->alloc, state->push_descriptors[i]);
+ anv_cmd_pipeline_state_finish(cmd_buffer, &state->gfx.base);
+ anv_cmd_pipeline_state_finish(cmd_buffer, &state->compute.base);
for (uint32_t i = 0; i < MESA_SHADER_STAGES; i++)
vk_free(&cmd_buffer->pool->alloc, state->push_constants[i]);
@@ -495,6 +503,7 @@ void anv_CmdSetStencilReference(
static void
anv_cmd_buffer_bind_descriptor_set(struct anv_cmd_buffer *cmd_buffer,
+ VkPipelineBindPoint bind_point,
struct anv_pipeline_layout *layout,
uint32_t set_index,
struct anv_descriptor_set *set,
@@ -504,7 +513,14 @@ anv_cmd_buffer_bind_descriptor_set(struct
anv_cmd_buffer *cmd_buffer,
Post by Jason Ekstrand
struct anv_descriptor_set_layout *set_layout =
layout->set[set_index].layout;
- cmd_buffer->state.descriptors[set_index] = set;
+ struct anv_cmd_pipeline_state *pipe_state;
+ if (bind_point == VK_PIPELINE_BIND_POINT_COMPUTE) {
+ pipe_state = &cmd_buffer->state.compute.base;
+ } else {
+ assert(bind_point == VK_PIPELINE_BIND_POINT_GRAPHICS);
+ pipe_state = &cmd_buffer->state.gfx.base;
+ }
+ pipe_state->descriptors[set_index] = set;
if (dynamic_offsets) {
if (set_layout->dynamic_offset_count > 0) {
@@ -514,9 +530,9 @@ anv_cmd_buffer_bind_descriptor_set(struct
anv_cmd_buffer *cmd_buffer,
Post by Jason Ekstrand
/* Assert that everything is in range */
assert(set_layout->dynamic_offset_count <=
*dynamic_offset_count);
Post by Jason Ekstrand
assert(dynamic_offset_start + set_layout->dynamic_offset_count
<=
Post by Jason Ekstrand
- ARRAY_SIZE(cmd_buffer->state.dynamic_offsets));
+ ARRAY_SIZE(pipe_state->dynamic_offsets));
- typed_memcpy(&cmd_buffer->state.dynamic_offsets[dynamic_
offset_start],
Post by Jason Ekstrand
+ typed_memcpy(&pipe_state->dynamic_offsets[dynamic_
offset_start],
Post by Jason Ekstrand
*dynamic_offsets, set_layout->dynamic_offset_
count);
Post by Jason Ekstrand
*dynamic_offsets += set_layout->dynamic_offset_count;
@@ -524,7 +540,13 @@ anv_cmd_buffer_bind_descriptor_set(struct
anv_cmd_buffer *cmd_buffer,
Post by Jason Ekstrand
}
}
- cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
+ if (bind_point == VK_PIPELINE_BIND_POINT_COMPUTE) {
+ cmd_buffer->state.descriptors_dirty |=
VK_SHADER_STAGE_COMPUTE_BIT;
Post by Jason Ekstrand
+ } else {
+ assert(bind_point == VK_PIPELINE_BIND_POINT_GRAPHICS);
+ cmd_buffer->state.descriptors_dirty |=
+ set_layout->shader_stages & VK_SHADER_STAGE_ALL_GRAPHICS;
Should we put () around the right hand side? We seem to be using that
elsewhere.
Meh. I think it's fairly obvious what's going on. I do sometimes insist
on wraping == statements in () because a = b == c is something I find hard
to read but a = b & c seems obvious to me.
Post by Jason Ekstrand
Post by Jason Ekstrand
+ }
}
void anv_CmdBindDescriptorSets(
@@ -544,8 +566,8 @@ void anv_CmdBindDescriptorSets(
for (uint32_t i = 0; i < descriptorSetCount; i++) {
ANV_FROM_HANDLE(anv_descriptor_set, set, pDescriptorSets[i]);
- anv_cmd_buffer_bind_descriptor_set(cmd_buffer, layout,
- firstSet + i, set,
+ anv_cmd_buffer_bind_descriptor_set(cmd_buffer, pipelineBindPoint,
+ layout, firstSet + i, set,
&dynamicOffsetCount,
&pDynamicOffsets);
}
@@ -851,10 +873,19 @@ anv_cmd_buffer_get_depth_stencil_view(const
struct anv_cmd_buffer *cmd_buffer)
Post by Jason Ekstrand
static struct anv_push_descriptor_set *
anv_cmd_buffer_get_push_descriptor_set(struct anv_cmd_buffer
*cmd_buffer,
Post by Jason Ekstrand
+ VkPipelineBindPoint bind_point,
uint32_t set)
{
+ struct anv_cmd_pipeline_state *pipe_state;
+ if (bind_point == VK_PIPELINE_BIND_POINT_COMPUTE) {
+ pipe_state = &cmd_buffer->state.compute.base;
+ } else {
+ assert(bind_point == VK_PIPELINE_BIND_POINT_GRAPHICS);
+ pipe_state = &cmd_buffer->state.gfx.base;
+ }
+
struct anv_push_descriptor_set **push_set =
- &cmd_buffer->state.push_descriptors[set];
+ &pipe_state->push_descriptors[set];
if (*push_set == NULL) {
*push_set = vk_alloc(&cmd_buffer->pool->alloc,
@@ -880,15 +911,14 @@ void anv_CmdPushDescriptorSetKHR(
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
- assert(pipelineBindPoint == VK_PIPELINE_BIND_POINT_GRAPHICS ||
- pipelineBindPoint == VK_PIPELINE_BIND_POINT_COMPUTE);
assert(_set < MAX_SETS);
const struct anv_descriptor_set_layout *set_layout =
layout->set[_set].layout;
struct anv_push_descriptor_set *push_set =
- anv_cmd_buffer_get_push_descriptor_set(cmd_buffer, _set);
+ anv_cmd_buffer_get_push_descriptor_set(cmd_buffer,
+ pipelineBindPoint, _set);
if (!push_set)
return;
@@ -958,8 +988,8 @@ void anv_CmdPushDescriptorSetKHR(
}
}
- anv_cmd_buffer_bind_descriptor_set(cmd_buffer, layout, _set,
- set, NULL, NULL);
+ anv_cmd_buffer_bind_descriptor_set(cmd_buffer, pipelineBindPoint,
+ layout, _set, set, NULL, NULL);
}
void anv_CmdPushDescriptorSetWithTemplateKHR(
@@ -980,7 +1010,8 @@ void anv_CmdPushDescriptorSetWithTemplateKHR(
layout->set[_set].layout;
struct anv_push_descriptor_set *push_set =
- anv_cmd_buffer_get_push_descriptor_set(cmd_buffer, _set);
+ anv_cmd_buffer_get_push_descriptor_set(cmd_buffer,
+ template->bind_point,
_set);
Post by Jason Ekstrand
if (!push_set)
return;
@@ -997,6 +1028,6 @@ void anv_CmdPushDescriptorSetWithTemplateKHR(
template,
pData);
- anv_cmd_buffer_bind_descriptor_set(cmd_buffer, layout, _set,
- set, NULL, NULL);
+ anv_cmd_buffer_bind_descriptor_set(cmd_buffer, template->bind_point,
+ layout, _set, set, NULL, NULL);
}
diff --git a/src/intel/vulkan/anv_descriptor_set.c
b/src/intel/vulkan/anv_descriptor_set.c
Post by Jason Ekstrand
index 629c041..63557ab 100644
--- a/src/intel/vulkan/anv_descriptor_set.c
+++ b/src/intel/vulkan/anv_descriptor_set.c
@@ -891,6 +891,8 @@ VkResult anv_CreateDescriptorUpdateTemplateKHR(
if (template == NULL)
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
+ template->bind_point = pCreateInfo->pipelineBindPoint;
+
if (pCreateInfo->templateType == VK_DESCRIPTOR_UPDATE_TEMPLATE_
TYPE_DESCRIPTOR_SET_KHR)
Post by Jason Ekstrand
template->set = pCreateInfo->set;
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_
private.h
Post by Jason Ekstrand
index e8d0d27..f1868a3 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1319,6 +1319,8 @@ struct anv_descriptor_template_entry {
};
struct anv_descriptor_update_template {
+ VkPipelineBindPoint bind_point;
+
/* The descriptor set this template corresponds to. This value is
only
Post by Jason Ekstrand
* valid if the template was created with the templateType
* VK_DESCRIPTOR_UPDATE_TEMPLATE_TYPE_DESCRIPTOR_SET_KHR.
@@ -1686,6 +1688,11 @@ struct anv_attachment_state {
*/
struct anv_cmd_pipeline_state {
struct anv_pipeline *pipeline;
+
+ struct anv_descriptor_set *descriptors[MAX_SETS];
+ uint32_t dynamic_offsets[MAX_DYNAMIC_BUFFERS];
+
+ struct anv_push_descriptor_set *push_descriptors[MAX_SETS];
};
/** State tracking for graphics pipeline
@@ -1734,16 +1741,12 @@ struct anv_cmd_state {
VkRect2D render_area;
uint32_t restart_index;
struct anv_vertex_binding
vertex_bindings[MAX_VBS];
Post by Jason Ekstrand
- struct anv_descriptor_set * descriptors[MAX_SETS];
- uint32_t
dynamic_offsets[MAX_DYNAMIC_BUFFERS];
Post by Jason Ekstrand
VkShaderStageFlags push_constant_stages;
struct anv_push_constants *
push_constants[MESA_SHADER_STAGES];
Post by Jason Ekstrand
struct anv_state
binding_tables[MESA_SHADER_STAGES];
Post by Jason Ekstrand
struct anv_state
samplers[MESA_SHADER_STAGES];
Post by Jason Ekstrand
struct anv_dynamic_state dynamic;
- struct anv_push_descriptor_set *
push_descriptors[MAX_SETS];
Post by Jason Ekstrand
-
/**
* Whether or not the gen8 PMA fix is enabled. We ensure that, at
the top
Post by Jason Ekstrand
* of any command buffer it is disabled by disabling it in
EndCommandBuffer
Post by Jason Ekstrand
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
Post by Jason Ekstrand
index 994c996..75aa40a 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -1434,32 +1434,32 @@ cmd_buffer_alloc_push_constants(struct
anv_cmd_buffer *cmd_buffer)
Post by Jason Ekstrand
}
static const struct anv_descriptor *
-anv_descriptor_for_binding(const struct anv_cmd_buffer *cmd_buffer,
+anv_descriptor_for_binding(const struct anv_cmd_pipeline_state
*pipe_state,
Post by Jason Ekstrand
const struct anv_pipeline_binding *binding)
{
assert(binding->set < MAX_SETS);
const struct anv_descriptor_set *set =
- cmd_buffer->state.descriptors[binding->set];
+ pipe_state->descriptors[binding->set];
const uint32_t offset =
set->layout->binding[binding->binding].descriptor_index;
return &set->descriptors[offset + binding->index];
}
static uint32_t
-dynamic_offset_for_binding(const struct anv_cmd_buffer *cmd_buffer,
+dynamic_offset_for_binding(const struct anv_cmd_pipeline_state
*pipe_state,
Post by Jason Ekstrand
const struct anv_pipeline *pipeline,
const struct anv_pipeline_binding *binding)
{
assert(binding->set < MAX_SETS);
const struct anv_descriptor_set *set =
- cmd_buffer->state.descriptors[binding->set];
+ pipe_state->descriptors[binding->set];
uint32_t dynamic_offset_idx =
pipeline->layout->set[binding->set].dynamic_offset_start +
set->layout->binding[binding->binding].dynamic_offset_index +
binding->index;
- return cmd_buffer->state.dynamic_offsets[dynamic_offset_idx];
+ return pipe_state->dynamic_offsets[dynamic_offset_idx];
}
static VkResult
@@ -1567,7 +1567,7 @@ emit_binding_table(struct anv_cmd_buffer
*cmd_buffer,
Post by Jason Ekstrand
}
const struct anv_descriptor *desc =
- anv_descriptor_for_binding(cmd_buffer, binding);
+ anv_descriptor_for_binding(pipe_state, binding);
switch (desc->type) {
@@ -1643,7 +1643,7 @@ emit_binding_table(struct anv_cmd_buffer
*cmd_buffer,
Post by Jason Ekstrand
case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC: {
/* Compute the offset within the buffer */
uint32_t dynamic_offset =
- dynamic_offset_for_binding(cmd_buffer, pipeline, binding);
+ dynamic_offset_for_binding(pipe_state, pipeline, binding);
uint64_t offset = desc->offset + dynamic_offset;
/* Clamp to the buffer size */
offset = MIN2(offset, desc->buffer->size);
@@ -1724,7 +1724,7 @@ emit_samplers(struct anv_cmd_buffer *cmd_buffer,
for (uint32_t s = 0; s < map->sampler_count; s++) {
struct anv_pipeline_binding *binding =
&map->sampler_to_descriptor[s];
Post by Jason Ekstrand
const struct anv_descriptor *desc =
- anv_descriptor_for_binding(cmd_buffer, binding);
+ anv_descriptor_for_binding(pipe_state, binding);
if (desc->type != VK_DESCRIPTOR_TYPE_SAMPLER &&
desc->type != VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER)
@@ -1848,7 +1848,8 @@ static void
cmd_buffer_flush_push_constants(struct anv_cmd_buffer *cmd_buffer,
VkShaderStageFlags dirty_stages)
{
- const struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.
pipeline;
Post by Jason Ekstrand
+ const struct anv_cmd_graphics_state *gfx_state =
&cmd_buffer->state.gfx;
Post by Jason Ekstrand
+ const struct anv_pipeline *pipeline = gfx_state->base.pipeline;
static const uint32_t push_constant_opcodes[] = {
[MESA_SHADER_VERTEX] = 21,
@@ -1901,7 +1902,7 @@ cmd_buffer_flush_push_constants(struct
anv_cmd_buffer *cmd_buffer,
Post by Jason Ekstrand
&bind_map->surface_to_descriptor[surface];
const struct anv_descriptor *desc =
- anv_descriptor_for_binding(cmd_buffer, binding);
+ anv_descriptor_for_binding(&gfx_state->base,
binding);
Post by Jason Ekstrand
struct anv_address read_addr;
uint32_t read_len;
@@ -1917,7 +1918,8 @@ cmd_buffer_flush_push_constants(struct
anv_cmd_buffer *cmd_buffer,
Post by Jason Ekstrand
assert(desc->type == VK_DESCRIPTOR_TYPE_UNIFORM_
BUFFER_DYNAMIC);
Post by Jason Ekstrand
uint32_t dynamic_offset =
- dynamic_offset_for_binding(cmd_buffer, pipeline,
binding);
Post by Jason Ekstrand
+ dynamic_offset_for_binding(&gfx_state->base,
+ pipeline, binding);
uint32_t buf_offset =
MIN2(desc->offset + dynamic_offset,
desc->buffer->size);
Post by Jason Ekstrand
uint32_t buf_range =
--
2.5.0.400.gff86faf
_______________________________________________
mesa-dev mailing list
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Pohjolainen, Topi
2018-01-15 19:26:07 UTC
Permalink
Raw Message
Post by Jason Ekstrand
On Mon, Jan 15, 2018 at 7:11 AM, Pohjolainen, Topi <
Post by Jason Ekstrand
Post by Jason Ekstrand
"pipelineBindPoint is a VkPipelineBindPoint indicating whether the
descriptors will be used by graphics pipelines or compute pipelines.
There is a separate set of bind points for each of graphics and
compute, so binding one does not disturb the other."
Up until now, we've been ignoring the pipeline bind point and had just
one bind point for everything. This commit separates things out into
separate bind points.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102897
---
src/intel/vulkan/anv_cmd_buffer.c | 65
++++++++++++++++++++++++++---------
Post by Jason Ekstrand
src/intel/vulkan/anv_descriptor_set.c | 2 ++
src/intel/vulkan/anv_private.h | 11 +++---
src/intel/vulkan/genX_cmd_buffer.c | 24 +++++++------
4 files changed, 70 insertions(+), 32 deletions(-)
diff --git a/src/intel/vulkan/anv_cmd_buffer.c
b/src/intel/vulkan/anv_cmd_buffer.c
Post by Jason Ekstrand
index 636f515..9720e7e 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -124,12 +124,20 @@ anv_cmd_state_init(struct anv_cmd_buffer
*cmd_buffer)
Post by Jason Ekstrand
}
static void
+anv_cmd_pipeline_state_finish(struct anv_cmd_buffer *cmd_buffer,
+ struct anv_cmd_pipeline_state *pipe_state)
+{
+ for (uint32_t i = 0; i < ARRAY_SIZE(pipe_state->push_descriptors);
i++)
Post by Jason Ekstrand
+ vk_free(&cmd_buffer->pool->alloc, pipe_state->push_descriptors[
i]);
Post by Jason Ekstrand
+}
+
+static void
anv_cmd_state_finish(struct anv_cmd_buffer *cmd_buffer)
{
struct anv_cmd_state *state = &cmd_buffer->state;
- for (uint32_t i = 0; i < ARRAY_SIZE(state->push_descriptors); i++)
- vk_free(&cmd_buffer->pool->alloc, state->push_descriptors[i]);
+ anv_cmd_pipeline_state_finish(cmd_buffer, &state->gfx.base);
+ anv_cmd_pipeline_state_finish(cmd_buffer, &state->compute.base);
for (uint32_t i = 0; i < MESA_SHADER_STAGES; i++)
vk_free(&cmd_buffer->pool->alloc, state->push_constants[i]);
@@ -495,6 +503,7 @@ void anv_CmdSetStencilReference(
static void
anv_cmd_buffer_bind_descriptor_set(struct anv_cmd_buffer *cmd_buffer,
+ VkPipelineBindPoint bind_point,
struct anv_pipeline_layout *layout,
uint32_t set_index,
struct anv_descriptor_set *set,
@@ -504,7 +513,14 @@ anv_cmd_buffer_bind_descriptor_set(struct
anv_cmd_buffer *cmd_buffer,
Post by Jason Ekstrand
struct anv_descriptor_set_layout *set_layout =
layout->set[set_index].layout;
- cmd_buffer->state.descriptors[set_index] = set;
+ struct anv_cmd_pipeline_state *pipe_state;
+ if (bind_point == VK_PIPELINE_BIND_POINT_COMPUTE) {
+ pipe_state = &cmd_buffer->state.compute.base;
+ } else {
+ assert(bind_point == VK_PIPELINE_BIND_POINT_GRAPHICS);
+ pipe_state = &cmd_buffer->state.gfx.base;
+ }
+ pipe_state->descriptors[set_index] = set;
if (dynamic_offsets) {
if (set_layout->dynamic_offset_count > 0) {
@@ -514,9 +530,9 @@ anv_cmd_buffer_bind_descriptor_set(struct
anv_cmd_buffer *cmd_buffer,
Post by Jason Ekstrand
/* Assert that everything is in range */
assert(set_layout->dynamic_offset_count <=
*dynamic_offset_count);
Post by Jason Ekstrand
assert(dynamic_offset_start + set_layout->dynamic_offset_count
<=
Post by Jason Ekstrand
- ARRAY_SIZE(cmd_buffer->state.dynamic_offsets));
+ ARRAY_SIZE(pipe_state->dynamic_offsets));
- typed_memcpy(&cmd_buffer->state.dynamic_offsets[dynamic_
offset_start],
Post by Jason Ekstrand
+ typed_memcpy(&pipe_state->dynamic_offsets[dynamic_
offset_start],
Post by Jason Ekstrand
*dynamic_offsets, set_layout->dynamic_offset_
count);
Post by Jason Ekstrand
*dynamic_offsets += set_layout->dynamic_offset_count;
@@ -524,7 +540,13 @@ anv_cmd_buffer_bind_descriptor_set(struct
anv_cmd_buffer *cmd_buffer,
Post by Jason Ekstrand
}
}
- cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
+ if (bind_point == VK_PIPELINE_BIND_POINT_COMPUTE) {
+ cmd_buffer->state.descriptors_dirty |=
VK_SHADER_STAGE_COMPUTE_BIT;
Post by Jason Ekstrand
+ } else {
+ assert(bind_point == VK_PIPELINE_BIND_POINT_GRAPHICS);
+ cmd_buffer->state.descriptors_dirty |=
+ set_layout->shader_stages & VK_SHADER_STAGE_ALL_GRAPHICS;
Should we put () around the right hand side? We seem to be using that
elsewhere.
Meh. I think it's fairly obvious what's going on. I do sometimes insist
on wraping == statements in () because a = b == c is something I find hard
to read but a = b & c seems obvious to me.
Ok, I was just checking that you wanted it that way.

Jason Ekstrand
2017-12-16 01:09:08 UTC
Permalink
Raw Message
---
src/intel/vulkan/genX_cmd_buffer.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index 9d6f753..994c996 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -1723,10 +1723,8 @@ emit_samplers(struct anv_cmd_buffer *cmd_buffer,

for (uint32_t s = 0; s < map->sampler_count; s++) {
struct anv_pipeline_binding *binding = &map->sampler_to_descriptor[s];
- struct anv_descriptor_set *set =
- cmd_buffer->state.descriptors[binding->set];
- uint32_t offset = set->layout->binding[binding->binding].descriptor_index;
- struct anv_descriptor *desc = &set->descriptors[offset + binding->index];
+ const struct anv_descriptor *desc =
+ anv_descriptor_for_binding(cmd_buffer, binding);

if (desc->type != VK_DESCRIPTOR_TYPE_SAMPLER &&
desc->type != VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER)
--
2.5.0.400.gff86faf
Jason Ekstrand
2017-12-16 01:09:11 UTC
Permalink
Raw Message
Vertex buffers are entirely a graphics pipeline thing.
---
src/intel/vulkan/anv_cmd_buffer.c | 4 ++--
src/intel/vulkan/anv_private.h | 2 +-
src/intel/vulkan/genX_blorp_exec.c | 2 +-
src/intel/vulkan/genX_cmd_buffer.c | 6 +++---
4 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/intel/vulkan/anv_cmd_buffer.c b/src/intel/vulkan/anv_cmd_buffer.c
index ad5baee..dd6fb9d 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -352,7 +352,7 @@ void anv_CmdBindPipeline(

case VK_PIPELINE_BIND_POINT_GRAPHICS:
cmd_buffer->state.gfx.base.pipeline = pipeline;
- cmd_buffer->state.vb_dirty |= pipeline->vb_used;
+ cmd_buffer->state.gfx.vb_dirty |= pipeline->vb_used;
cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_PIPELINE;
cmd_buffer->state.push_constants_dirty |= pipeline->active_stages;
cmd_buffer->state.descriptors_dirty |= pipeline->active_stages;
@@ -590,7 +590,7 @@ void anv_CmdBindVertexBuffers(
for (uint32_t i = 0; i < bindingCount; i++) {
vb[firstBinding + i].buffer = anv_buffer_from_handle(pBuffers[i]);
vb[firstBinding + i].offset = pOffsets[i];
- cmd_buffer->state.vb_dirty |= 1 << (firstBinding + i);
+ cmd_buffer->state.gfx.vb_dirty |= 1 << (firstBinding + i);
}
}

diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 413f8d5..2e4e2ff 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1706,6 +1706,7 @@ struct anv_cmd_graphics_state {
struct anv_cmd_pipeline_state base;

anv_cmd_dirty_mask_t dirty;
+ uint32_t vb_dirty;
};

/** State tracking for compute pipeline
@@ -1730,7 +1731,6 @@ struct anv_cmd_state {
struct anv_cmd_graphics_state gfx;
struct anv_cmd_compute_state compute;

- uint32_t vb_dirty;
enum anv_pipe_bits pending_pipe_bits;
uint32_t num_workgroups_offset;
struct anv_bo *num_workgroups_bo;
diff --git a/src/intel/vulkan/genX_blorp_exec.c b/src/intel/vulkan/genX_blorp_exec.c
index 871ade8..04f7675 100644
--- a/src/intel/vulkan/genX_blorp_exec.c
+++ b/src/intel/vulkan/genX_blorp_exec.c
@@ -218,7 +218,7 @@ genX(blorp_exec)(struct blorp_batch *batch,

blorp_exec(batch, params);

- cmd_buffer->state.vb_dirty = ~0;
+ cmd_buffer->state.gfx.vb_dirty = ~0;
cmd_buffer->state.gfx.dirty = ~0;
cmd_buffer->state.push_constants_dirty = ~0;
}
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index 491ec7b..a94c565 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -1982,7 +1982,7 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer)
struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;
uint32_t *p;

- uint32_t vb_emit = cmd_buffer->state.vb_dirty & pipeline->vb_used;
+ uint32_t vb_emit = cmd_buffer->state.gfx.vb_dirty & pipeline->vb_used;

assert((pipeline->active_stages & VK_SHADER_STAGE_COMPUTE_BIT) == 0);

@@ -2033,7 +2033,7 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer)
}
}

- cmd_buffer->state.vb_dirty &= ~vb_emit;
+ cmd_buffer->state.gfx.vb_dirty &= ~vb_emit;

if (cmd_buffer->state.gfx.dirty & ANV_CMD_DIRTY_PIPELINE) {
anv_batch_emit_batch(&cmd_buffer->batch, &pipeline->batch);
@@ -3100,7 +3100,7 @@ genX(cmd_buffer_set_subpass)(struct anv_cmd_buffer *cmd_buffer,
* of each subpass.
*/
if (GEN_GEN == 7)
- cmd_buffer->state.vb_dirty |= ~0;
+ cmd_buffer->state.gfx.vb_dirty |= ~0;

/* Perform transitions to the subpass layout before any writes have
* occurred.
--
2.5.0.400.gff86faf
Jason Ekstrand
2017-12-16 01:09:10 UTC
Permalink
Raw Message
---
src/intel/vulkan/anv_cmd_buffer.c | 24 +++++++++++------------
src/intel/vulkan/anv_private.h | 6 ++++--
src/intel/vulkan/gen7_cmd_buffer.c | 28 +++++++++++++-------------
src/intel/vulkan/gen8_cmd_buffer.c | 40 +++++++++++++++++++-------------------
src/intel/vulkan/genX_blorp_exec.c | 2 +-
src/intel/vulkan/genX_cmd_buffer.c | 20 +++++++++----------
src/intel/vulkan/genX_gpu_memcpy.c | 2 +-
7 files changed, 62 insertions(+), 60 deletions(-)

diff --git a/src/intel/vulkan/anv_cmd_buffer.c b/src/intel/vulkan/anv_cmd_buffer.c
index 9720e7e..ad5baee 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -345,7 +345,7 @@ void anv_CmdBindPipeline(
switch (pipelineBindPoint) {
case VK_PIPELINE_BIND_POINT_COMPUTE:
cmd_buffer->state.compute.base.pipeline = pipeline;
- cmd_buffer->state.compute_dirty |= ANV_CMD_DIRTY_PIPELINE;
+ cmd_buffer->state.compute.pipeline_dirty = true;
cmd_buffer->state.push_constants_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
cmd_buffer->state.descriptors_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
break;
@@ -353,12 +353,12 @@ void anv_CmdBindPipeline(
case VK_PIPELINE_BIND_POINT_GRAPHICS:
cmd_buffer->state.gfx.base.pipeline = pipeline;
cmd_buffer->state.vb_dirty |= pipeline->vb_used;
- cmd_buffer->state.dirty |= ANV_CMD_DIRTY_PIPELINE;
+ cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_PIPELINE;
cmd_buffer->state.push_constants_dirty |= pipeline->active_stages;
cmd_buffer->state.descriptors_dirty |= pipeline->active_stages;

/* Apply the dynamic state from the pipeline */
- cmd_buffer->state.dirty |= pipeline->dynamic_state_mask;
+ cmd_buffer->state.gfx.dirty |= pipeline->dynamic_state_mask;
anv_dynamic_state_copy(&cmd_buffer->state.dynamic,
&pipeline->dynamic_state,
pipeline->dynamic_state_mask);
@@ -385,7 +385,7 @@ void anv_CmdSetViewport(
memcpy(cmd_buffer->state.dynamic.viewport.viewports + firstViewport,
pViewports, viewportCount * sizeof(*pViewports));

- cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT;
+ cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT;
}

void anv_CmdSetScissor(
@@ -403,7 +403,7 @@ void anv_CmdSetScissor(
memcpy(cmd_buffer->state.dynamic.scissor.scissors + firstScissor,
pScissors, scissorCount * sizeof(*pScissors));

- cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_SCISSOR;
+ cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_SCISSOR;
}

void anv_CmdSetLineWidth(
@@ -413,7 +413,7 @@ void anv_CmdSetLineWidth(
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);

cmd_buffer->state.dynamic.line_width = lineWidth;
- cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH;
+ cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH;
}

void anv_CmdSetDepthBias(
@@ -428,7 +428,7 @@ void anv_CmdSetDepthBias(
cmd_buffer->state.dynamic.depth_bias.clamp = depthBiasClamp;
cmd_buffer->state.dynamic.depth_bias.slope = depthBiasSlopeFactor;

- cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
+ cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
}

void anv_CmdSetBlendConstants(
@@ -440,7 +440,7 @@ void anv_CmdSetBlendConstants(
memcpy(cmd_buffer->state.dynamic.blend_constants,
blendConstants, sizeof(float) * 4);

- cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS;
+ cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS;
}

void anv_CmdSetDepthBounds(
@@ -453,7 +453,7 @@ void anv_CmdSetDepthBounds(
cmd_buffer->state.dynamic.depth_bounds.min = minDepthBounds;
cmd_buffer->state.dynamic.depth_bounds.max = maxDepthBounds;

- cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS;
+ cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS;
}

void anv_CmdSetStencilCompareMask(
@@ -468,7 +468,7 @@ void anv_CmdSetStencilCompareMask(
if (faceMask & VK_STENCIL_FACE_BACK_BIT)
cmd_buffer->state.dynamic.stencil_compare_mask.back = compareMask;

- cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK;
+ cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK;
}

void anv_CmdSetStencilWriteMask(
@@ -483,7 +483,7 @@ void anv_CmdSetStencilWriteMask(
if (faceMask & VK_STENCIL_FACE_BACK_BIT)
cmd_buffer->state.dynamic.stencil_write_mask.back = writeMask;

- cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK;
+ cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK;
}

void anv_CmdSetStencilReference(
@@ -498,7 +498,7 @@ void anv_CmdSetStencilReference(
if (faceMask & VK_STENCIL_FACE_BACK_BIT)
cmd_buffer->state.dynamic.stencil_reference.back = reference;

- cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
+ cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
}

static void
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index f1868a3..413f8d5 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1704,6 +1704,8 @@ struct anv_cmd_pipeline_state {
*/
struct anv_cmd_graphics_state {
struct anv_cmd_pipeline_state base;
+
+ anv_cmd_dirty_mask_t dirty;
};

/** State tracking for compute pipeline
@@ -1715,6 +1717,8 @@ struct anv_cmd_graphics_state {
*/
struct anv_cmd_compute_state {
struct anv_cmd_pipeline_state base;
+
+ bool pipeline_dirty;
};

/** State required while building cmd buffer */
@@ -1727,8 +1731,6 @@ struct anv_cmd_state {
struct anv_cmd_compute_state compute;

uint32_t vb_dirty;
- anv_cmd_dirty_mask_t dirty;
- anv_cmd_dirty_mask_t compute_dirty;
enum anv_pipe_bits pending_pipe_bits;
uint32_t num_workgroups_offset;
struct anv_bo *num_workgroups_bo;
diff --git a/src/intel/vulkan/gen7_cmd_buffer.c b/src/intel/vulkan/gen7_cmd_buffer.c
index 8d7fd8f..f16056a 100644
--- a/src/intel/vulkan/gen7_cmd_buffer.c
+++ b/src/intel/vulkan/gen7_cmd_buffer.c
@@ -113,7 +113,7 @@ void genX(CmdBindIndexBuffer)(
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
ANV_FROM_HANDLE(anv_buffer, buffer, _buffer);

- cmd_buffer->state.dirty |= ANV_CMD_DIRTY_INDEX_BUFFER;
+ cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_INDEX_BUFFER;
if (GEN_IS_HASWELL)
cmd_buffer->state.restart_index = restart_index_for_type[indexType];
cmd_buffer->state.gen7.index_buffer = buffer;
@@ -156,10 +156,10 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
{
struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;

- if (cmd_buffer->state.dirty & (ANV_CMD_DIRTY_PIPELINE |
- ANV_CMD_DIRTY_RENDER_TARGETS |
- ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH |
- ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS)) {
+ if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE |
+ ANV_CMD_DIRTY_RENDER_TARGETS |
+ ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH |
+ ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS)) {
uint32_t sf_dw[GENX(3DSTATE_SF_length)];
struct GENX(3DSTATE_SF) sf = {
GENX(3DSTATE_SF_header),
@@ -174,8 +174,8 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
anv_batch_emit_merge(&cmd_buffer->batch, sf_dw, pipeline->gen7.sf);
}

- if (cmd_buffer->state.dirty & (ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS |
- ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE)) {
+ if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS |
+ ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE)) {
struct anv_dynamic_state *d = &cmd_buffer->state.dynamic;
struct anv_state cc_state =
anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
@@ -197,10 +197,10 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
}
}

- if (cmd_buffer->state.dirty & (ANV_CMD_DIRTY_PIPELINE |
- ANV_CMD_DIRTY_RENDER_TARGETS |
- ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK |
- ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK)) {
+ if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE |
+ ANV_CMD_DIRTY_RENDER_TARGETS |
+ ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK |
+ ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK)) {
uint32_t depth_stencil_dw[GENX(DEPTH_STENCIL_STATE_length)];
struct anv_dynamic_state *d = &cmd_buffer->state.dynamic;

@@ -229,8 +229,8 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
}

if (cmd_buffer->state.gen7.index_buffer &&
- cmd_buffer->state.dirty & (ANV_CMD_DIRTY_PIPELINE |
- ANV_CMD_DIRTY_INDEX_BUFFER)) {
+ cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE |
+ ANV_CMD_DIRTY_INDEX_BUFFER)) {
struct anv_buffer *buffer = cmd_buffer->state.gen7.index_buffer;
uint32_t offset = cmd_buffer->state.gen7.index_offset;

@@ -255,7 +255,7 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
}
}

- cmd_buffer->state.dirty = 0;
+ cmd_buffer->state.gfx.dirty = 0;
}

void
diff --git a/src/intel/vulkan/gen8_cmd_buffer.c b/src/intel/vulkan/gen8_cmd_buffer.c
index 002e50c..b0a44ef 100644
--- a/src/intel/vulkan/gen8_cmd_buffer.c
+++ b/src/intel/vulkan/gen8_cmd_buffer.c
@@ -383,8 +383,8 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
{
struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;

- if (cmd_buffer->state.dirty & (ANV_CMD_DIRTY_PIPELINE |
- ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH)) {
+ if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE |
+ ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH)) {
uint32_t sf_dw[GENX(3DSTATE_SF_length)];
struct GENX(3DSTATE_SF) sf = {
GENX(3DSTATE_SF_header),
@@ -402,8 +402,8 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
anv_batch_emit_merge(&cmd_buffer->batch, sf_dw, pipeline->gen8.sf);
}

- if (cmd_buffer->state.dirty & (ANV_CMD_DIRTY_PIPELINE |
- ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS)){
+ if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE |
+ ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS)){
uint32_t raster_dw[GENX(3DSTATE_RASTER_length)];
struct GENX(3DSTATE_RASTER) raster = {
GENX(3DSTATE_RASTER_header),
@@ -422,8 +422,8 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
* using a big old #if switch here.
*/
#if GEN_GEN == 8
- if (cmd_buffer->state.dirty & (ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS |
- ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE)) {
+ if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS |
+ ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE)) {
struct anv_dynamic_state *d = &cmd_buffer->state.dynamic;
struct anv_state cc_state =
anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
@@ -447,10 +447,10 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
}
}

- if (cmd_buffer->state.dirty & (ANV_CMD_DIRTY_PIPELINE |
- ANV_CMD_DIRTY_RENDER_TARGETS |
- ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK |
- ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK)) {
+ if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE |
+ ANV_CMD_DIRTY_RENDER_TARGETS |
+ ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK |
+ ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK)) {
uint32_t wm_depth_stencil_dw[GENX(3DSTATE_WM_DEPTH_STENCIL_length)];
struct anv_dynamic_state *d = &cmd_buffer->state.dynamic;

@@ -477,7 +477,7 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
want_depth_pma_fix(cmd_buffer));
}
#else
- if (cmd_buffer->state.dirty & ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS) {
+ if (cmd_buffer->state.gfx.dirty & ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS) {
struct anv_state cc_state =
anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
GENX(COLOR_CALC_STATE_length) * 4,
@@ -498,11 +498,11 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
}
}

- if (cmd_buffer->state.dirty & (ANV_CMD_DIRTY_PIPELINE |
- ANV_CMD_DIRTY_RENDER_TARGETS |
- ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK |
- ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK |
- ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE)) {
+ if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE |
+ ANV_CMD_DIRTY_RENDER_TARGETS |
+ ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK |
+ ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK |
+ ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE)) {
uint32_t dwords[GENX(3DSTATE_WM_DEPTH_STENCIL_length)];
struct anv_dynamic_state *d = &cmd_buffer->state.dynamic;
struct GENX(3DSTATE_WM_DEPTH_STENCIL) wm_depth_stencil = {
@@ -531,15 +531,15 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
}
#endif

- if (cmd_buffer->state.dirty & (ANV_CMD_DIRTY_PIPELINE |
- ANV_CMD_DIRTY_INDEX_BUFFER)) {
+ if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE |
+ ANV_CMD_DIRTY_INDEX_BUFFER)) {
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_VF), vf) {
vf.IndexedDrawCutIndexEnable = pipeline->primitive_restart;
vf.CutIndex = cmd_buffer->state.restart_index;
}
}

- cmd_buffer->state.dirty = 0;
+ cmd_buffer->state.gfx.dirty = 0;
}

void genX(CmdBindIndexBuffer)(
@@ -571,7 +571,7 @@ void genX(CmdBindIndexBuffer)(
ib.BufferSize = buffer->size - offset;
}

- cmd_buffer->state.dirty |= ANV_CMD_DIRTY_INDEX_BUFFER;
+ cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_INDEX_BUFFER;
}

/* Set of stage bits for which are pipelined, i.e. they get queued by the
diff --git a/src/intel/vulkan/genX_blorp_exec.c b/src/intel/vulkan/genX_blorp_exec.c
index e849a3b..871ade8 100644
--- a/src/intel/vulkan/genX_blorp_exec.c
+++ b/src/intel/vulkan/genX_blorp_exec.c
@@ -219,6 +219,6 @@ genX(blorp_exec)(struct blorp_batch *batch,
blorp_exec(batch, params);

cmd_buffer->state.vb_dirty = ~0;
- cmd_buffer->state.dirty = ~0;
+ cmd_buffer->state.gfx.dirty = ~0;
cmd_buffer->state.push_constants_dirty = ~0;
}
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index 75aa40a..491ec7b 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -982,7 +982,7 @@ genX(BeginCommandBuffer)(
result = genX(cmd_buffer_setup_attachments)(cmd_buffer,
cmd_buffer->state.pass, NULL);

- cmd_buffer->state.dirty |= ANV_CMD_DIRTY_RENDER_TARGETS;
+ cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_RENDER_TARGETS;
}

return result;
@@ -2035,7 +2035,7 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer)

cmd_buffer->state.vb_dirty &= ~vb_emit;

- if (cmd_buffer->state.dirty & ANV_CMD_DIRTY_PIPELINE) {
+ if (cmd_buffer->state.gfx.dirty & ANV_CMD_DIRTY_PIPELINE) {
anv_batch_emit_batch(&cmd_buffer->batch, &pipeline->batch);

/* The exact descriptor layout is pulled from the pipeline, so we need
@@ -2072,7 +2072,7 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer)
#endif

/* Render targets live in the same binding table as fragment descriptors */
- if (cmd_buffer->state.dirty & ANV_CMD_DIRTY_RENDER_TARGETS)
+ if (cmd_buffer->state.gfx.dirty & ANV_CMD_DIRTY_RENDER_TARGETS)
cmd_buffer->state.descriptors_dirty |= VK_SHADER_STAGE_FRAGMENT_BIT;

/* We emit the binding tables and sampler tables first, then emit push
@@ -2098,16 +2098,16 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer)
if (dirty)
cmd_buffer_emit_descriptor_pointers(cmd_buffer, dirty);

- if (cmd_buffer->state.dirty & ANV_CMD_DIRTY_DYNAMIC_VIEWPORT)
+ if (cmd_buffer->state.gfx.dirty & ANV_CMD_DIRTY_DYNAMIC_VIEWPORT)
gen8_cmd_buffer_emit_viewport(cmd_buffer);

- if (cmd_buffer->state.dirty & (ANV_CMD_DIRTY_DYNAMIC_VIEWPORT |
+ if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_DYNAMIC_VIEWPORT |
ANV_CMD_DIRTY_PIPELINE)) {
gen8_cmd_buffer_emit_depth_viewport(cmd_buffer,
pipeline->depth_clamp_enable);
}

- if (cmd_buffer->state.dirty & ANV_CMD_DIRTY_DYNAMIC_SCISSOR)
+ if (cmd_buffer->state.gfx.dirty & ANV_CMD_DIRTY_DYNAMIC_SCISSOR)
gen7_cmd_buffer_emit_scissor(cmd_buffer);

genX(cmd_buffer_flush_dynamic_state)(cmd_buffer);
@@ -2512,7 +2512,7 @@ genX(cmd_buffer_flush_compute_state)(struct anv_cmd_buffer *cmd_buffer)

genX(flush_pipeline_select_gpgpu)(cmd_buffer);

- if (cmd_buffer->state.compute_dirty & ANV_CMD_DIRTY_PIPELINE) {
+ if (cmd_buffer->state.compute.pipeline_dirty) {
/* From the Sky Lake PRM Vol 2a, MEDIA_VFE_STATE:
*
* "A stalling PIPE_CONTROL is required before MEDIA_VFE_STATE unless
@@ -2528,7 +2528,7 @@ genX(cmd_buffer_flush_compute_state)(struct anv_cmd_buffer *cmd_buffer)
}

if ((cmd_buffer->state.descriptors_dirty & VK_SHADER_STAGE_COMPUTE_BIT) ||
- (cmd_buffer->state.compute_dirty & ANV_CMD_DIRTY_PIPELINE)) {
+ cmd_buffer->state.compute.pipeline_dirty) {
/* FIXME: figure out descriptors for gen7 */
result = flush_compute_descriptor_set(cmd_buffer);
if (result != VK_SUCCESS)
@@ -2549,7 +2549,7 @@ genX(cmd_buffer_flush_compute_state)(struct anv_cmd_buffer *cmd_buffer)
}
}

- cmd_buffer->state.compute_dirty = 0;
+ cmd_buffer->state.compute.pipeline_dirty = false;

genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer);
}
@@ -3090,7 +3090,7 @@ genX(cmd_buffer_set_subpass)(struct anv_cmd_buffer *cmd_buffer,
{
cmd_buffer->state.subpass = subpass;

- cmd_buffer->state.dirty |= ANV_CMD_DIRTY_RENDER_TARGETS;
+ cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_RENDER_TARGETS;

/* Our implementation of VK_KHR_multiview uses instancing to draw the
* different views. If the client asks for instancing, we need to use the
diff --git a/src/intel/vulkan/genX_gpu_memcpy.c b/src/intel/vulkan/genX_gpu_memcpy.c
index 5b00b31..f3ada93 100644
--- a/src/intel/vulkan/genX_gpu_memcpy.c
+++ b/src/intel/vulkan/genX_gpu_memcpy.c
@@ -272,5 +272,5 @@ genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
prim.BaseVertexLocation = 0;
}

- cmd_buffer->state.dirty |= ANV_CMD_DIRTY_PIPELINE;
+ cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_PIPELINE;
}
--
2.5.0.400.gff86faf
Jason Ekstrand
2017-12-16 01:09:12 UTC
Permalink
Raw Message
We were already doing this for some packets to keep the lines shorter.
We may as well just do it for all of them.
---
src/intel/vulkan/gen7_cmd_buffer.c | 19 +++++++++----------
src/intel/vulkan/gen8_cmd_buffer.c | 32 +++++++++++++++-----------------
2 files changed, 24 insertions(+), 27 deletions(-)

diff --git a/src/intel/vulkan/gen7_cmd_buffer.c b/src/intel/vulkan/gen7_cmd_buffer.c
index f16056a..6571b07 100644
--- a/src/intel/vulkan/gen7_cmd_buffer.c
+++ b/src/intel/vulkan/gen7_cmd_buffer.c
@@ -155,6 +155,7 @@ void
genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
{
struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;
+ struct anv_dynamic_state *d = &cmd_buffer->state.dynamic;

if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE |
ANV_CMD_DIRTY_RENDER_TARGETS |
@@ -164,10 +165,10 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
struct GENX(3DSTATE_SF) sf = {
GENX(3DSTATE_SF_header),
.DepthBufferSurfaceFormat = get_depth_format(cmd_buffer),
- .LineWidth = cmd_buffer->state.dynamic.line_width,
- .GlobalDepthOffsetConstant = cmd_buffer->state.dynamic.depth_bias.bias,
- .GlobalDepthOffsetScale = cmd_buffer->state.dynamic.depth_bias.slope,
- .GlobalDepthOffsetClamp = cmd_buffer->state.dynamic.depth_bias.clamp
+ .LineWidth = d->line_width,
+ .GlobalDepthOffsetConstant = d->depth_bias.bias,
+ .GlobalDepthOffsetScale = d->depth_bias.slope,
+ .GlobalDepthOffsetClamp = d->depth_bias.clamp
};
GENX(3DSTATE_SF_pack)(NULL, sf_dw, &sf);

@@ -176,16 +177,15 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)

if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS |
ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE)) {
- struct anv_dynamic_state *d = &cmd_buffer->state.dynamic;
struct anv_state cc_state =
anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
GENX(COLOR_CALC_STATE_length) * 4,
64);
struct GENX(COLOR_CALC_STATE) cc = {
- .BlendConstantColorRed = cmd_buffer->state.dynamic.blend_constants[0],
- .BlendConstantColorGreen = cmd_buffer->state.dynamic.blend_constants[1],
- .BlendConstantColorBlue = cmd_buffer->state.dynamic.blend_constants[2],
- .BlendConstantColorAlpha = cmd_buffer->state.dynamic.blend_constants[3],
+ .BlendConstantColorRed = d->blend_constants[0],
+ .BlendConstantColorGreen = d->blend_constants[1],
+ .BlendConstantColorBlue = d->blend_constants[2],
+ .BlendConstantColorAlpha = d->blend_constants[3],
.StencilReferenceValue = d->stencil_reference.front & 0xff,
.BackfaceStencilReferenceValue = d->stencil_reference.back & 0xff,
};
@@ -202,7 +202,6 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK |
ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK)) {
uint32_t depth_stencil_dw[GENX(DEPTH_STENCIL_STATE_length)];
- struct anv_dynamic_state *d = &cmd_buffer->state.dynamic;

struct GENX(DEPTH_STENCIL_STATE) depth_stencil = {
.StencilTestMask = d->stencil_compare_mask.front & 0xff,
diff --git a/src/intel/vulkan/gen8_cmd_buffer.c b/src/intel/vulkan/gen8_cmd_buffer.c
index b0a44ef..d939d03 100644
--- a/src/intel/vulkan/gen8_cmd_buffer.c
+++ b/src/intel/vulkan/gen8_cmd_buffer.c
@@ -382,6 +382,7 @@ void
genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
{
struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;
+ struct anv_dynamic_state *d = &cmd_buffer->state.dynamic;

if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE |
ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH)) {
@@ -391,12 +392,12 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
};
#if GEN_GEN == 8
if (cmd_buffer->device->info.is_cherryview) {
- sf.CHVLineWidth = cmd_buffer->state.dynamic.line_width;
+ sf.CHVLineWidth = d->line_width;
} else {
- sf.LineWidth = cmd_buffer->state.dynamic.line_width;
+ sf.LineWidth = d->line_width;
}
#else
- sf.LineWidth = cmd_buffer->state.dynamic.line_width,
+ sf.LineWidth = d->line_width,
#endif
GENX(3DSTATE_SF_pack)(NULL, sf_dw, &sf);
anv_batch_emit_merge(&cmd_buffer->batch, sf_dw, pipeline->gen8.sf);
@@ -407,9 +408,9 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
uint32_t raster_dw[GENX(3DSTATE_RASTER_length)];
struct GENX(3DSTATE_RASTER) raster = {
GENX(3DSTATE_RASTER_header),
- .GlobalDepthOffsetConstant = cmd_buffer->state.dynamic.depth_bias.bias,
- .GlobalDepthOffsetScale = cmd_buffer->state.dynamic.depth_bias.slope,
- .GlobalDepthOffsetClamp = cmd_buffer->state.dynamic.depth_bias.clamp
+ .GlobalDepthOffsetConstant = d->depth_bias.bias,
+ .GlobalDepthOffsetScale = d->depth_bias.slope,
+ .GlobalDepthOffsetClamp = d->depth_bias.clamp
};
GENX(3DSTATE_RASTER_pack)(NULL, raster_dw, &raster);
anv_batch_emit_merge(&cmd_buffer->batch, raster_dw,
@@ -424,16 +425,15 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
#if GEN_GEN == 8
if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS |
ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE)) {
- struct anv_dynamic_state *d = &cmd_buffer->state.dynamic;
struct anv_state cc_state =
anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
GENX(COLOR_CALC_STATE_length) * 4,
64);
struct GENX(COLOR_CALC_STATE) cc = {
- .BlendConstantColorRed = cmd_buffer->state.dynamic.blend_constants[0],
- .BlendConstantColorGreen = cmd_buffer->state.dynamic.blend_constants[1],
- .BlendConstantColorBlue = cmd_buffer->state.dynamic.blend_constants[2],
- .BlendConstantColorAlpha = cmd_buffer->state.dynamic.blend_constants[3],
+ .BlendConstantColorRed = d->blend_constants[0],
+ .BlendConstantColorGreen = d->blend_constants[1],
+ .BlendConstantColorBlue = d->blend_constants[2],
+ .BlendConstantColorAlpha = d->blend_constants[3],
.StencilReferenceValue = d->stencil_reference.front & 0xff,
.BackfaceStencilReferenceValue = d->stencil_reference.back & 0xff,
};
@@ -452,7 +452,6 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK |
ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK)) {
uint32_t wm_depth_stencil_dw[GENX(3DSTATE_WM_DEPTH_STENCIL_length)];
- struct anv_dynamic_state *d = &cmd_buffer->state.dynamic;

struct GENX(3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil) = {
GENX(3DSTATE_WM_DEPTH_STENCIL_header),
@@ -483,10 +482,10 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
GENX(COLOR_CALC_STATE_length) * 4,
64);
struct GENX(COLOR_CALC_STATE) cc = {
- .BlendConstantColorRed = cmd_buffer->state.dynamic.blend_constants[0],
- .BlendConstantColorGreen = cmd_buffer->state.dynamic.blend_constants[1],
- .BlendConstantColorBlue = cmd_buffer->state.dynamic.blend_constants[2],
- .BlendConstantColorAlpha = cmd_buffer->state.dynamic.blend_constants[3],
+ .BlendConstantColorRed = d->blend_constants[0],
+ .BlendConstantColorGreen = d->blend_constants[1],
+ .BlendConstantColorBlue = d->blend_constants[2],
+ .BlendConstantColorAlpha = d->blend_constants[3],
};
GENX(COLOR_CALC_STATE_pack)(NULL, cc_state.map, &cc);

@@ -504,7 +503,6 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK |
ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE)) {
uint32_t dwords[GENX(3DSTATE_WM_DEPTH_STENCIL_length)];
- struct anv_dynamic_state *d = &cmd_buffer->state.dynamic;
struct GENX(3DSTATE_WM_DEPTH_STENCIL) wm_depth_stencil = {
GENX(3DSTATE_WM_DEPTH_STENCIL_header),
--
2.5.0.400.gff86faf
Jason Ekstrand
2017-12-16 01:09:13 UTC
Permalink
Raw Message
---
src/intel/vulkan/anv_cmd_buffer.c | 42 +++++++++++++++++++-------------------
src/intel/vulkan/anv_private.h | 3 ++-
src/intel/vulkan/gen7_cmd_buffer.c | 6 +++---
src/intel/vulkan/gen8_cmd_buffer.c | 12 ++++++-----
4 files changed, 33 insertions(+), 30 deletions(-)

diff --git a/src/intel/vulkan/anv_cmd_buffer.c b/src/intel/vulkan/anv_cmd_buffer.c
index dd6fb9d..bf80061 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -120,7 +120,7 @@ anv_cmd_state_init(struct anv_cmd_buffer *cmd_buffer)
memset(state, 0, sizeof(*state));

state->restart_index = UINT32_MAX;
- state->dynamic = default_dynamic_state;
+ state->gfx.dynamic = default_dynamic_state;
}

static void
@@ -359,7 +359,7 @@ void anv_CmdBindPipeline(

/* Apply the dynamic state from the pipeline */
cmd_buffer->state.gfx.dirty |= pipeline->dynamic_state_mask;
- anv_dynamic_state_copy(&cmd_buffer->state.dynamic,
+ anv_dynamic_state_copy(&cmd_buffer->state.gfx.dynamic,
&pipeline->dynamic_state,
pipeline->dynamic_state_mask);
break;
@@ -379,10 +379,10 @@ void anv_CmdSetViewport(
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);

const uint32_t total_count = firstViewport + viewportCount;
- if (cmd_buffer->state.dynamic.viewport.count < total_count)
- cmd_buffer->state.dynamic.viewport.count = total_count;
+ if (cmd_buffer->state.gfx.dynamic.viewport.count < total_count)
+ cmd_buffer->state.gfx.dynamic.viewport.count = total_count;

- memcpy(cmd_buffer->state.dynamic.viewport.viewports + firstViewport,
+ memcpy(cmd_buffer->state.gfx.dynamic.viewport.viewports + firstViewport,
pViewports, viewportCount * sizeof(*pViewports));

cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT;
@@ -397,10 +397,10 @@ void anv_CmdSetScissor(
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);

const uint32_t total_count = firstScissor + scissorCount;
- if (cmd_buffer->state.dynamic.scissor.count < total_count)
- cmd_buffer->state.dynamic.scissor.count = total_count;
+ if (cmd_buffer->state.gfx.dynamic.scissor.count < total_count)
+ cmd_buffer->state.gfx.dynamic.scissor.count = total_count;

- memcpy(cmd_buffer->state.dynamic.scissor.scissors + firstScissor,
+ memcpy(cmd_buffer->state.gfx.dynamic.scissor.scissors + firstScissor,
pScissors, scissorCount * sizeof(*pScissors));

cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_SCISSOR;
@@ -412,7 +412,7 @@ void anv_CmdSetLineWidth(
{
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);

- cmd_buffer->state.dynamic.line_width = lineWidth;
+ cmd_buffer->state.gfx.dynamic.line_width = lineWidth;
cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH;
}

@@ -424,9 +424,9 @@ void anv_CmdSetDepthBias(
{
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);

- cmd_buffer->state.dynamic.depth_bias.bias = depthBiasConstantFactor;
- cmd_buffer->state.dynamic.depth_bias.clamp = depthBiasClamp;
- cmd_buffer->state.dynamic.depth_bias.slope = depthBiasSlopeFactor;
+ cmd_buffer->state.gfx.dynamic.depth_bias.bias = depthBiasConstantFactor;
+ cmd_buffer->state.gfx.dynamic.depth_bias.clamp = depthBiasClamp;
+ cmd_buffer->state.gfx.dynamic.depth_bias.slope = depthBiasSlopeFactor;

cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
}
@@ -437,7 +437,7 @@ void anv_CmdSetBlendConstants(
{
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);

- memcpy(cmd_buffer->state.dynamic.blend_constants,
+ memcpy(cmd_buffer->state.gfx.dynamic.blend_constants,
blendConstants, sizeof(float) * 4);

cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS;
@@ -450,8 +450,8 @@ void anv_CmdSetDepthBounds(
{
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);

- cmd_buffer->state.dynamic.depth_bounds.min = minDepthBounds;
- cmd_buffer->state.dynamic.depth_bounds.max = maxDepthBounds;
+ cmd_buffer->state.gfx.dynamic.depth_bounds.min = minDepthBounds;
+ cmd_buffer->state.gfx.dynamic.depth_bounds.max = maxDepthBounds;

cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS;
}
@@ -464,9 +464,9 @@ void anv_CmdSetStencilCompareMask(
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);

if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
- cmd_buffer->state.dynamic.stencil_compare_mask.front = compareMask;
+ cmd_buffer->state.gfx.dynamic.stencil_compare_mask.front = compareMask;
if (faceMask & VK_STENCIL_FACE_BACK_BIT)
- cmd_buffer->state.dynamic.stencil_compare_mask.back = compareMask;
+ cmd_buffer->state.gfx.dynamic.stencil_compare_mask.back = compareMask;

cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK;
}
@@ -479,9 +479,9 @@ void anv_CmdSetStencilWriteMask(
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);

if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
- cmd_buffer->state.dynamic.stencil_write_mask.front = writeMask;
+ cmd_buffer->state.gfx.dynamic.stencil_write_mask.front = writeMask;
if (faceMask & VK_STENCIL_FACE_BACK_BIT)
- cmd_buffer->state.dynamic.stencil_write_mask.back = writeMask;
+ cmd_buffer->state.gfx.dynamic.stencil_write_mask.back = writeMask;

cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK;
}
@@ -494,9 +494,9 @@ void anv_CmdSetStencilReference(
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);

if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
- cmd_buffer->state.dynamic.stencil_reference.front = reference;
+ cmd_buffer->state.gfx.dynamic.stencil_reference.front = reference;
if (faceMask & VK_STENCIL_FACE_BACK_BIT)
- cmd_buffer->state.dynamic.stencil_reference.back = reference;
+ cmd_buffer->state.gfx.dynamic.stencil_reference.back = reference;

cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
}
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 2e4e2ff..5ceec6b 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1707,6 +1707,8 @@ struct anv_cmd_graphics_state {

anv_cmd_dirty_mask_t dirty;
uint32_t vb_dirty;
+
+ struct anv_dynamic_state dynamic;
};

/** State tracking for compute pipeline
@@ -1747,7 +1749,6 @@ struct anv_cmd_state {
struct anv_push_constants * push_constants[MESA_SHADER_STAGES];
struct anv_state binding_tables[MESA_SHADER_STAGES];
struct anv_state samplers[MESA_SHADER_STAGES];
- struct anv_dynamic_state dynamic;

/**
* Whether or not the gen8 PMA fix is enabled. We ensure that, at the top
diff --git a/src/intel/vulkan/gen7_cmd_buffer.c b/src/intel/vulkan/gen7_cmd_buffer.c
index 6571b07..db96c4f 100644
--- a/src/intel/vulkan/gen7_cmd_buffer.c
+++ b/src/intel/vulkan/gen7_cmd_buffer.c
@@ -48,8 +48,8 @@ clamp_int64(int64_t x, int64_t min, int64_t max)
void
gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer)
{
- uint32_t count = cmd_buffer->state.dynamic.scissor.count;
- const VkRect2D *scissors = cmd_buffer->state.dynamic.scissor.scissors;
+ uint32_t count = cmd_buffer->state.gfx.dynamic.scissor.count;
+ const VkRect2D *scissors = cmd_buffer->state.gfx.dynamic.scissor.scissors;
struct anv_state scissor_state =
anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, count * 8, 32);

@@ -155,7 +155,7 @@ void
genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
{
struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;
- struct anv_dynamic_state *d = &cmd_buffer->state.dynamic;
+ struct anv_dynamic_state *d = &cmd_buffer->state.gfx.dynamic;

if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE |
ANV_CMD_DIRTY_RENDER_TARGETS |
diff --git a/src/intel/vulkan/gen8_cmd_buffer.c b/src/intel/vulkan/gen8_cmd_buffer.c
index d939d03..2999c99 100644
--- a/src/intel/vulkan/gen8_cmd_buffer.c
+++ b/src/intel/vulkan/gen8_cmd_buffer.c
@@ -36,8 +36,9 @@
void
gen8_cmd_buffer_emit_viewport(struct anv_cmd_buffer *cmd_buffer)
{
- uint32_t count = cmd_buffer->state.dynamic.viewport.count;
- const VkViewport *viewports = cmd_buffer->state.dynamic.viewport.viewports;
+ uint32_t count = cmd_buffer->state.gfx.dynamic.viewport.count;
+ const VkViewport *viewports =
+ cmd_buffer->state.gfx.dynamic.viewport.viewports;
struct anv_state sf_clip_state =
anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, count * 64, 64);

@@ -79,8 +80,9 @@ void
gen8_cmd_buffer_emit_depth_viewport(struct anv_cmd_buffer *cmd_buffer,
bool depth_clamp_enable)
{
- uint32_t count = cmd_buffer->state.dynamic.viewport.count;
- const VkViewport *viewports = cmd_buffer->state.dynamic.viewport.viewports;
+ uint32_t count = cmd_buffer->state.gfx.dynamic.viewport.count;
+ const VkViewport *viewports =
+ cmd_buffer->state.gfx.dynamic.viewport.viewports;
struct anv_state cc_state =
anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, count * 8, 32);

@@ -382,7 +384,7 @@ void
genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
{
struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;
- struct anv_dynamic_state *d = &cmd_buffer->state.dynamic;
+ struct anv_dynamic_state *d = &cmd_buffer->state.gfx.dynamic;

if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE |
ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH)) {
--
2.5.0.400.gff86faf
Jason Ekstrand
2017-12-16 01:09:14 UTC
Permalink
Raw Message
While we're here, make it an anv_address.
---
src/intel/vulkan/anv_private.h | 4 ++--
src/intel/vulkan/genX_cmd_buffer.c | 17 ++++++++++-------
2 files changed, 12 insertions(+), 9 deletions(-)

diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 5ceec6b..70c83d9 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1722,6 +1722,8 @@ struct anv_cmd_compute_state {
struct anv_cmd_pipeline_state base;

bool pipeline_dirty;
+
+ struct anv_address num_workgroups;
};

/** State required while building cmd buffer */
@@ -1734,8 +1736,6 @@ struct anv_cmd_state {
struct anv_cmd_compute_state compute;

enum anv_pipe_bits pending_pipe_bits;
- uint32_t num_workgroups_offset;
- struct anv_bo *num_workgroups_bo;
VkShaderStageFlags descriptors_dirty;
VkShaderStageFlags push_constants_dirty;

diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index a94c565..dea0248 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -1505,8 +1505,8 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer,

if (stage == MESA_SHADER_COMPUTE &&
get_cs_prog_data(pipeline)->uses_num_work_groups) {
- struct anv_bo *bo = cmd_buffer->state.num_workgroups_bo;
- uint32_t bo_offset = cmd_buffer->state.num_workgroups_offset;
+ struct anv_bo *bo = cmd_buffer->state.compute.num_workgroups.bo;
+ uint32_t bo_offset = cmd_buffer->state.compute.num_workgroups.offset;

struct anv_state surface_state;
surface_state =
@@ -2594,9 +2594,10 @@ void genX(CmdDispatch)(
sizes[1] = y;
sizes[2] = z;
anv_state_flush(cmd_buffer->device, state);
- cmd_buffer->state.num_workgroups_offset = state.offset;
- cmd_buffer->state.num_workgroups_bo =
- &cmd_buffer->device->dynamic_state_pool.block_pool.bo;
+ cmd_buffer->state.compute.num_workgroups = (struct anv_address) {
+ .bo = &cmd_buffer->device->dynamic_state_pool.block_pool.bo,
+ .offset = state.offset,
+ };
}

genX(cmd_buffer_flush_compute_state)(cmd_buffer);
@@ -2643,8 +2644,10 @@ void genX(CmdDispatchIndirect)(
#endif

if (prog_data->uses_num_work_groups) {
- cmd_buffer->state.num_workgroups_offset = bo_offset;
- cmd_buffer->state.num_workgroups_bo = bo;
+ cmd_buffer->state.compute.num_workgroups = (struct anv_address) {
+ .bo = bo,
+ .offset = bo_offset,
+ };
}

genX(cmd_buffer_flush_compute_state)(cmd_buffer);
--
2.5.0.400.gff86faf
Jason Ekstrand
2017-12-16 01:09:15 UTC
Permalink
Raw Message
---
src/intel/vulkan/anv_private.h | 12 ++++++------
src/intel/vulkan/gen7_cmd_buffer.c | 14 +++++++-------
2 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 70c83d9..57b0051 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1709,6 +1709,12 @@ struct anv_cmd_graphics_state {
uint32_t vb_dirty;

struct anv_dynamic_state dynamic;
+
+ struct {
+ struct anv_buffer *index_buffer;
+ uint32_t index_type; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */
+ uint32_t index_offset;
+ } gen7;
};

/** State tracking for compute pipeline
@@ -1782,12 +1788,6 @@ struct anv_cmd_state {
* is one of the states in render_pass_states.
*/
struct anv_state null_surface_state;
-
- struct {
- struct anv_buffer * index_buffer;
- uint32_t index_type; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */
- uint32_t index_offset;
- } gen7;
};

struct anv_cmd_pool {
diff --git a/src/intel/vulkan/gen7_cmd_buffer.c b/src/intel/vulkan/gen7_cmd_buffer.c
index db96c4f..cbeb838 100644
--- a/src/intel/vulkan/gen7_cmd_buffer.c
+++ b/src/intel/vulkan/gen7_cmd_buffer.c
@@ -116,9 +116,9 @@ void genX(CmdBindIndexBuffer)(
cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_INDEX_BUFFER;
if (GEN_IS_HASWELL)
cmd_buffer->state.restart_index = restart_index_for_type[indexType];
- cmd_buffer->state.gen7.index_buffer = buffer;
- cmd_buffer->state.gen7.index_type = vk_to_gen_index_type[indexType];
- cmd_buffer->state.gen7.index_offset = offset;
+ cmd_buffer->state.gfx.gen7.index_buffer = buffer;
+ cmd_buffer->state.gfx.gen7.index_type = vk_to_gen_index_type[indexType];
+ cmd_buffer->state.gfx.gen7.index_offset = offset;
}

static uint32_t
@@ -227,11 +227,11 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
}
}

- if (cmd_buffer->state.gen7.index_buffer &&
+ if (cmd_buffer->state.gfx.gen7.index_buffer &&
cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE |
ANV_CMD_DIRTY_INDEX_BUFFER)) {
- struct anv_buffer *buffer = cmd_buffer->state.gen7.index_buffer;
- uint32_t offset = cmd_buffer->state.gen7.index_offset;
+ struct anv_buffer *buffer = cmd_buffer->state.gfx.gen7.index_buffer;
+ uint32_t offset = cmd_buffer->state.gfx.gen7.index_offset;

#if GEN_IS_HASWELL
anv_batch_emit(&cmd_buffer->batch, GEN75_3DSTATE_VF, vf) {
@@ -244,7 +244,7 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
#if !GEN_IS_HASWELL
ib.CutIndexEnable = pipeline->primitive_restart;
#endif
- ib.IndexFormat = cmd_buffer->state.gen7.index_type;
+ ib.IndexFormat = cmd_buffer->state.gfx.gen7.index_type;
ib.MemoryObjectControlState = GENX(MOCS);

ib.BufferStartingAddress =
--
2.5.0.400.gff86faf
Józef Kucia
2017-12-31 10:57:42 UTC
Permalink
Raw Message
Post by Jason Ekstrand
https://bugs.freedesktop.org/show_bug.cgi?id=102897
FWIW, I tested the series. It fixes the original issue, and I didn't
notice any regressions:

Tested-by: Józef Kucia <***@gmail.com>
Pohjolainen, Topi
2018-01-15 15:25:14 UTC
Permalink
Raw Message
Post by Jason Ekstrand
https://bugs.freedesktop.org/show_bug.cgi?id=102897
Unfortunately, the fix is either a lot of patches or very messy. This
series (as is common for me) takes the lots of patches approach. The
general idea is to break out a large chunk of anv_cmd_state into sub-
structs for graphics and compute. This way, it's very clear when you're
accessing any bit of state that you're pulling from one or the other. By
giving these a base struct, we can also make clear that a certain set of
states are are per-pipeline-bind-point. In order to reduce churn in the
patches which actually move state from one struct to another, there are
several patches which just make us make better use of helper functions and
temporary variables.
anv/pipeline: Don't assert on more than 32 samplers
anv/cmd_state: Drop the scratch_size field
anv/cmd_buffer: Get rid of the meta query workaround
anv/cmd_buffer: Rework anv_cmd_state_reset
anv/cmd_buffer: Use some pre-existing pipeline temporaries
anv/cmd_buffer: Add substructs to anv_cmd_state for graphics and
compute
anv: Remove semicolons from vk_error[f] definitions
anv/cmd_buffer: Refactor ensure_push_descriptor_set
anv/cmd_buffer: Add a helper for binding descriptor sets
anv/cmd_buffer: Use anv_descriptor_for_binding for samplers
anv: Separate compute and graphics descriptor sets
anv/cmd_buffer: Move dirty bits into anv_cmd_*_state
anv/cmd_buffer: Move vb_dirty bits into anv_cmd_graphics_state
anv/cmd_buffer: Use a temporary variable for dynamic state
anv/cmd_buffer: Move dynamic state to graphics state
anv/cmd_buffer: Move num_workgroups to compute state
anv/cmd_buffer: Move gen7 index buffer state to graphics state
src/intel/vulkan/anv_cmd_buffer.c | 274 +++++++++++++++++++---------------
src/intel/vulkan/anv_descriptor_set.c | 2 +
src/intel/vulkan/anv_private.h | 85 ++++++++---
src/intel/vulkan/gen7_cmd_buffer.c | 67 ++++-----
src/intel/vulkan/gen8_cmd_buffer.c | 91 ++++++-----
src/intel/vulkan/genX_blorp_exec.c | 4 +-
src/intel/vulkan/genX_cmd_buffer.c | 121 ++++++++-------
src/intel/vulkan/genX_gpu_memcpy.c | 2 +-
src/intel/vulkan/genX_pipeline.c | 8 +-
src/intel/vulkan/genX_query.c | 14 --
10 files changed, 369 insertions(+), 299 deletions(-)
--
2.5.0.400.gff86faf
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