Discussion:
[Mesa-dev] [PATCH 1/2] ac/nir: Fix nir_texop_lod on GFX for 1D arrays.
Bas Nieuwenhuizen
2017-10-22 16:43:52 UTC
Permalink
Fixes: 1bcb953e166 'radv: handle GFX9 1D textures'
---
src/amd/common/ac_nir_to_llvm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 83b49b535c6..473dd67355b 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -4747,7 +4747,9 @@ static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
filler = LLVMConstReal(ctx->ac.f32, 0.5);

if (instr->sampler_dim == GLSL_SAMPLER_DIM_1D) {
- if (instr->is_array) {
+ /* No nir_texop_lod, because it does not take a slice
+ * even with array textures. */
+ if (instr->is_array && instr->op != nir_texop_lod ) {
address[count] = address[count - 1];
address[count - 1] = filler;
count++;
--
2.14.2
Bas Nieuwenhuizen
2017-10-22 16:43:53 UTC
Permalink
Since it also uses the output vector before writing to memory.

Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for now."'
---
src/amd/vulkan/radv_shader.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 07e68d6032b..6176a2e590d 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -265,9 +265,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
indirect_mask |= nir_var_shader_in;
}
if (!llvm_has_working_vgpr_indexing &&
- (nir->info.stage == MESA_SHADER_VERTEX ||
- nir->info.stage == MESA_SHADER_TESS_EVAL ||
- nir->info.stage == MESA_SHADER_FRAGMENT))
+ nir->info.stage != MESA_SHADER_TESS_CTRL)
indirect_mask |= nir_var_shader_out;

/* TODO: We shouldn't need to do this, however LLVM isn't currently
--
2.14.2
Timothy Arceri
2017-10-22 22:17:49 UTC
Permalink
Post by Bas Nieuwenhuizen
Since it also uses the output vector before writing to memory.
Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for now."'
---
src/amd/vulkan/radv_shader.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 07e68d6032b..6176a2e590d 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -265,9 +265,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
indirect_mask |= nir_var_shader_in;
}
if (!llvm_has_working_vgpr_indexing &&
- (nir->info.stage == MESA_SHADER_VERTEX ||
- nir->info.stage == MESA_SHADER_TESS_EVAL ||
- nir->info.stage == MESA_SHADER_FRAGMENT))
+ nir->info.stage != MESA_SHADER_TESS_CTRL)
indirect_mask |= nir_var_shader_out;
/* TODO: We shouldn't need to do this, however LLVM isn't currently
Andres Gomez
2017-10-27 15:03:05 UTC
Permalink
Bas, this patch looks like it should have been marked as fixing
6ce550453f1 instead of e38685cc62e (?).

In any case, I was wondering whether it would be interesting to bring
them both to the 17.2 stable queue and whether we would also want
Timothy's preceding patch:

087e010b2b3dd83a539f97203909d6c43b5da87c radv: copy indirect lowering settings from radeonsi

Let me know what you think.
Post by Bas Nieuwenhuizen
Since it also uses the output vector before writing to memory.
Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for now."'
---
src/amd/vulkan/radv_shader.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 07e68d6032b..6176a2e590d 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -265,9 +265,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
indirect_mask |= nir_var_shader_in;
}
if (!llvm_has_working_vgpr_indexing &&
- (nir->info.stage == MESA_SHADER_VERTEX ||
- nir->info.stage == MESA_SHADER_TESS_EVAL ||
- nir->info.stage == MESA_SHADER_FRAGMENT))
+ nir->info.stage != MESA_SHADER_TESS_CTRL)
indirect_mask |= nir_var_shader_out;
/* TODO: We shouldn't need to do this, however LLVM isn't currently
--
Br,

Andres
Bas Nieuwenhuizen
2017-10-27 17:50:18 UTC
Permalink
Post by Andres Gomez
Bas, this patch looks like it should have been marked as fixing
6ce550453f1 instead of e38685cc62e (?).
Well my reasoning was that the bug got "visible" when we enabled Vega.
The patch you refer to fixed part of it, but not all of it, and then
this patch fixes the rest.
Post by Andres Gomez
In any case, I was wondering whether it would be interesting to bring
them both to the 17.2 stable queue and whether we would also want
087e010b2b3dd83a539f97203909d6c43b5da87c radv: copy indirect lowering settings from radeonsi
Yes, that would be reasonable. Timothy's patch is an optimization
though, so I'd be happy to send a backport that only generates the
variable needed for the other two if you'd prefer that.
Post by Andres Gomez
Let me know what you think.
Post by Bas Nieuwenhuizen
Since it also uses the output vector before writing to memory.
Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for now."'
---
src/amd/vulkan/radv_shader.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 07e68d6032b..6176a2e590d 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -265,9 +265,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
indirect_mask |= nir_var_shader_in;
}
if (!llvm_has_working_vgpr_indexing &&
- (nir->info.stage == MESA_SHADER_VERTEX ||
- nir->info.stage == MESA_SHADER_TESS_EVAL ||
- nir->info.stage == MESA_SHADER_FRAGMENT))
+ nir->info.stage != MESA_SHADER_TESS_CTRL)
indirect_mask |= nir_var_shader_out;
/* TODO: We shouldn't need to do this, however LLVM isn't currently
--
Br,
Andres
Andres Gomez
2017-10-30 16:55:01 UTC
Permalink
[...]
Post by Bas Nieuwenhuizen
Post by Andres Gomez
In any case, I was wondering whether it would be interesting to bring
them both to the 17.2 stable queue and whether we would also want
087e010b2b3dd83a539f97203909d6c43b5da87c radv: copy indirect lowering settings from radeonsi
Yes, that would be reasonable. Timothy's patch is an optimization
though, so I'd be happy to send a backport that only generates the
variable needed for the other two if you'd prefer that.
That would be great.

Thanks, Bas! ☺
--
Br,

Andres
Andres Gomez
2017-11-06 10:25:28 UTC
Permalink
Bas, how is the backport for this patch going? The pre-release announce
is planned for this Wednesday so it'd great to have it latest by
tomorrow.

Thanks!
Post by Andres Gomez
[...]
Post by Bas Nieuwenhuizen
Post by Andres Gomez
In any case, I was wondering whether it would be interesting to bring
them both to the 17.2 stable queue and whether we would also want
087e010b2b3dd83a539f97203909d6c43b5da87c radv: copy indirect lowering settings from radeonsi
Yes, that would be reasonable. Timothy's patch is an optimization
though, so I'd be happy to send a backport that only generates the
variable needed for the other two if you'd prefer that.
That would be great.
Thanks, Bas! ☺
--
Br,

Andres
Bas Nieuwenhuizen
2017-11-07 09:02:44 UTC
Permalink
The backports and cherry-picks are available at
https://patchwork.freedesktop.org/series/33323/ .
Post by Andres Gomez
Bas, how is the backport for this patch going? The pre-release announce
is planned for this Wednesday so it'd great to have it latest by
tomorrow.
Thanks!
Post by Andres Gomez
[...]
Post by Bas Nieuwenhuizen
Post by Andres Gomez
In any case, I was wondering whether it would be interesting to bring
them both to the 17.2 stable queue and whether we would also want
087e010b2b3dd83a539f97203909d6c43b5da87c radv: copy indirect lowering settings from radeonsi
Yes, that would be reasonable. Timothy's patch is an optimization
though, so I'd be happy to send a backport that only generates the
variable needed for the other two if you'd prefer that.
That would be great.
Thanks, Bas! ☺
--
Br,
Andres
Andres Gomez
2017-11-07 10:46:19 UTC
Permalink
Queued.

Thanks a lot, Bas. Very much appreciated ☺
Post by Bas Nieuwenhuizen
The backports and cherry-picks are available at
https://patchwork.freedesktop.org/series/33323/ .
Post by Andres Gomez
Bas, how is the backport for this patch going? The pre-release announce
is planned for this Wednesday so it'd great to have it latest by
tomorrow.
Thanks!
Post by Andres Gomez
[...]
Post by Bas Nieuwenhuizen
Post by Andres Gomez
In any case, I was wondering whether it would be interesting to bring
them both to the 17.2 stable queue and whether we would also want
087e010b2b3dd83a539f97203909d6c43b5da87c radv: copy indirect lowering settings from radeonsi
Yes, that would be reasonable. Timothy's patch is an optimization
though, so I'd be happy to send a backport that only generates the
variable needed for the other two if you'd prefer that.
That would be great.
Thanks, Bas! ☺
--
Br,
Andres
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mesa-stable mailing list
https://lists.freedesktop.org/mailman/listinfo/mesa-stable
--
Br,

Andres
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