Discussion:
[PATCH 3/9] meta: Silence unused parameter warning
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Ian Romanick
2017-06-16 21:01:51 UTC
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From: Ian Romanick <***@intel.com>

drivers/common/meta.c:2694:71: warning: unused parameter ‘dims’ [-Wunused-parameter]
copytexsubimage_using_blit_framebuffer(struct gl_context *ctx, GLuint dims,
^~~~

Signed-off-by: Ian Romanick <***@intel.com>
---
src/mesa/drivers/common/meta.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index 1ff4651..39499c7 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -2770,7 +2770,7 @@ get_temp_image_type(struct gl_context *ctx, mesa_format format)
* glBlitFramebuffer() to implement glCopyTexSubImage().
*/
static bool
-copytexsubimage_using_blit_framebuffer(struct gl_context *ctx, GLuint dims,
+copytexsubimage_using_blit_framebuffer(struct gl_context *ctx,
struct gl_texture_image *texImage,
GLint xoffset,
GLint yoffset,
@@ -2864,7 +2864,7 @@ _mesa_meta_CopyTexSubImage(struct gl_context *ctx, GLuint dims,
GLint bpp;
void *buf;

- if (copytexsubimage_using_blit_framebuffer(ctx, dims,
+ if (copytexsubimage_using_blit_framebuffer(ctx,
texImage,
xoffset, yoffset, zoffset,
rb,
--
2.9.4
Ian Romanick
2017-06-16 21:01:50 UTC
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From: Ian Romanick <***@intel.com>

Signed-off-by: Ian Romanick <***@intel.com>
---
src/intel/genxml/gen_pack_header.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/genxml/gen_pack_header.py b/src/intel/genxml/gen_pack_header.py
index fefbc9a..fb30119 100644
--- a/src/intel/genxml/gen_pack_header.py
+++ b/src/intel/genxml/gen_pack_header.py
@@ -578,7 +578,7 @@ class Parser(object):

def emit_pack_function(self, name, group):
name = self.gen_prefix(name)
- print("static inline void\n%s_pack(__gen_user_data *data, void * restrict dst,\n%sconst struct %s * restrict values)\n{" %
+ print("static inline void\n%s_pack(__attribute__((unused)) __gen_user_data *data, __attribute__((unused)) void * restrict dst,\n%s__attribute__((unused)) const struct %s * restrict values)\n{" %
(name, ' ' * (len(name) + 6), name))

(dwords, length) = group.collect_dwords_and_length()
--
2.9.4
Jason Ekstrand
2017-06-16 22:56:16 UTC
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Post by Ian Romanick
---
src/intel/genxml/gen_pack_header.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/genxml/gen_pack_header.py
b/src/intel/genxml/gen_pack_header.py
index fefbc9a..fb30119 100644
--- a/src/intel/genxml/gen_pack_header.py
+++ b/src/intel/genxml/gen_pack_header.py
name = self.gen_prefix(name)
- print("static inline void\n%s_pack(__gen_user_data *data, void *
restrict dst,\n%sconst struct %s * restrict values)\n{" %
+ print("static inline void\n%s_pack(__attribute__((unused))
__gen_user_data *data, __attribute__((unused)) void * restrict
dst,\n%s__attribute__((unused)) const struct %s * restrict values)\n{" %
That line is getting long... Dylan, what's the best way to break it?
Post by Ian Romanick
(name, ' ' * (len(name) + 6), name))
(dwords, length) = group.collect_dwords_and_length()
--
2.9.4
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Ian Romanick
2017-06-16 21:01:52 UTC
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From: Ian Romanick <***@intel.com>

drivers/common/meta_blit.c: In function ‘setup_glsl_msaa_blit_scaled_shader’:
drivers/common/meta_blit.c:62:58: warning: unused parameter ‘filter’ [-Wunused-parameter]
GLenum target, GLenum filter)
^~~~~~

Signed-off-by: Ian Romanick <***@intel.com>
---
src/mesa/drivers/common/meta_blit.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/common/meta_blit.c b/src/mesa/drivers/common/meta_blit.c
index e8719a3..7adad46 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -59,7 +59,7 @@ static void
setup_glsl_msaa_blit_scaled_shader(struct gl_context *ctx,
struct blit_state *blit,
struct gl_renderbuffer *src_rb,
- GLenum target, GLenum filter)
+ GLenum target)
{
GLint loc_src_width, loc_src_height;
int i, samples;
@@ -581,7 +581,7 @@ setup_glsl_blit_framebuffer(struct gl_context *ctx,
2, texcoord_size, 0);

if (is_target_multisample && is_filter_scaled_resolve && is_scaled_blit) {
- setup_glsl_msaa_blit_scaled_shader(ctx, blit, src_rb, target, filter);
+ setup_glsl_msaa_blit_scaled_shader(ctx, blit, src_rb, target);
} else if (is_target_multisample) {
setup_glsl_msaa_blit_shader(ctx, blit, drawFb, src_rb, target);
} else {
--
2.9.4
Jason Ekstrand
2017-06-16 22:58:51 UTC
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drivers/common/meta_blit.c: In function ‘setup_glsl_msaa_blit_scaled_
drivers/common/meta_blit.c:62:58: warning: unused parameter ‘filter’
[-Wunused-parameter]
GLenum target, GLenum filter)
^~~~~~
---
src/mesa/drivers/common/meta_blit.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/common/meta_blit.c
b/src/mesa/drivers/common/meta_blit.c
index e8719a3..7adad46 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -59,7 +59,7 @@ static void
setup_glsl_msaa_blit_scaled_shader(struct gl_context *ctx,
struct blit_state *blit,
struct gl_renderbuffer *src_rb,
- GLenum target, GLenum filter)
+ GLenum target)
{
GLint loc_src_width, loc_src_height;
int i, samples;
@@ -581,7 +581,7 @@ setup_glsl_blit_framebuffer(struct gl_context *ctx,
2, texcoord_size, 0);
if (is_target_multisample && is_filter_scaled_resolve &&
is_scaled_blit) {
- setup_glsl_msaa_blit_scaled_shader(ctx, blit, src_rb, target, filter);
+ setup_glsl_msaa_blit_scaled_shader(ctx, blit, src_rb, target);
} else if (is_target_multisample) {
setup_glsl_msaa_blit_shader(ctx, blit, drawFb, src_rb, target);
} else {
--
2.9.4
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Ian Romanick
2017-06-16 21:01:54 UTC
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From: Jason Ekstrand <***@intel.com>

We call convert_to_single_slice so they may end up with a non-trivial
offset that needs to be taken into account.

v2 (idr): Also set needs_src_offset. Suggested by Jason.

Fixes ES2-CTS.functional.texture.specification.basic_copyteximage2d.cube_rgba
and ES2-CTS.functional.texture.specification.basic_copytexsubimage2d.cube_rgba
on G45.

Signed-off-by: Ian Romanick <***@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101284
---
src/intel/blorp/blorp_blit.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index d93cde2..e48e5da 100644
--- a/src/intel/blorp/blorp_blit.c
+++ b/src/intel/blorp/blorp_blit.c
@@ -1672,11 +1672,15 @@ try_blorp_blit(struct blorp_batch *batch,
/* The MinLOD and MinimumArrayElement don't work properly for cube maps.
* Convert them to a single slice on gen4.
*/
- if (params->dst.surf.usage & ISL_SURF_USAGE_CUBE_BIT)
+ if (params->dst.surf.usage & ISL_SURF_USAGE_CUBE_BIT) {
blorp_surf_convert_to_single_slice(batch->blorp->isl_dev, &params->dst);
+ wm_prog_key->need_dst_offset = true;
+ }

- if (params->src.surf.usage & ISL_SURF_USAGE_CUBE_BIT)
+ if (params->src.surf.usage & ISL_SURF_USAGE_CUBE_BIT) {
blorp_surf_convert_to_single_slice(batch->blorp->isl_dev, &params->src);
+ wm_prog_key->need_src_offset = true;
+ }
}

if (devinfo->gen > 6 &&
--
2.9.4
Jason Ekstrand
2017-06-16 22:57:22 UTC
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I probably shouldn't review a patch that says it's from me, but why not
Post by Ian Romanick
We call convert_to_single_slice so they may end up with a non-trivial
offset that needs to be taken into account.
v2 (idr): Also set needs_src_offset. Suggested by Jason.
Fixes ES2-CTS.functional.texture.specification.basic_
copyteximage2d.cube_rgba
and ES2-CTS.functional.texture.specification.basic_
copytexsubimage2d.cube_rgba
on G45.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101284
---
src/intel/blorp/blorp_blit.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index d93cde2..e48e5da 100644
--- a/src/intel/blorp/blorp_blit.c
+++ b/src/intel/blorp/blorp_blit.c
@@ -1672,11 +1672,15 @@ try_blorp_blit(struct blorp_batch *batch,
/* The MinLOD and MinimumArrayElement don't work properly for cube maps.
* Convert them to a single slice on gen4.
*/
- if (params->dst.surf.usage & ISL_SURF_USAGE_CUBE_BIT)
+ if (params->dst.surf.usage & ISL_SURF_USAGE_CUBE_BIT) {
blorp_surf_convert_to_single_slice(batch->blorp->isl_dev, &params->dst);
+ wm_prog_key->need_dst_offset = true;
+ }
- if (params->src.surf.usage & ISL_SURF_USAGE_CUBE_BIT)
+ if (params->src.surf.usage & ISL_SURF_USAGE_CUBE_BIT) {
blorp_surf_convert_to_single_slice(batch->blorp->isl_dev, &params->src);
+ wm_prog_key->need_src_offset = true;
+ }
}
if (devinfo->gen > 6 &&
--
2.9.4
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Ian Romanick
2017-06-16 21:01:56 UTC
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From: Ian Romanick <***@intel.com>

Previously the offset was only applied in the TXF case.

Signed-off-by: Ian Romanick <***@intel.com>
Suggested-by: Jason Ekstrand <***@intel.com>
---
src/intel/blorp/blorp_blit.c | 3 +++
1 file changed, 3 insertions(+)

diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index 317a2f3..f552302 100644
--- a/src/intel/blorp/blorp_blit.c
+++ b/src/intel/blorp/blorp_blit.c
@@ -202,6 +202,9 @@ static nir_ssa_def *
blorp_nir_tex(nir_builder *b, struct brw_blorp_blit_vars *v,
const struct brw_blorp_blit_prog_key *key, nir_ssa_def *pos)
{
+ if (key->need_src_offset)
+ pos = nir_fadd(b, pos, nir_i2f32(b, nir_load_var(b, v->v_src_offset)));
+
/* If the sampler requires normalized coordinates, we need to compensate. */
if (key->src_coords_normalized)
pos = nir_fmul(b, pos, nir_load_var(b, v->v_src_inv_size));
--
2.9.4
Jason Ekstrand
2017-06-16 22:59:14 UTC
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Post by Ian Romanick
Previously the offset was only applied in the TXF case.
---
src/intel/blorp/blorp_blit.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index 317a2f3..f552302 100644
--- a/src/intel/blorp/blorp_blit.c
+++ b/src/intel/blorp/blorp_blit.c
@@ -202,6 +202,9 @@ static nir_ssa_def *
blorp_nir_tex(nir_builder *b, struct brw_blorp_blit_vars *v,
const struct brw_blorp_blit_prog_key *key, nir_ssa_def *pos)
{
+ if (key->need_src_offset)
+ pos = nir_fadd(b, pos, nir_i2f32(b, nir_load_var(b,
v->v_src_offset)));
+
/* If the sampler requires normalized coordinates, we need to compensate. */
if (key->src_coords_normalized)
pos = nir_fmul(b, pos, nir_load_var(b, v->v_src_inv_size));
--
2.9.4
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Ian Romanick
2017-06-16 21:01:57 UTC
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From: Ian Romanick <***@intel.com>

When intel_miptree_alloc_non_msrt_mcs fails, fall back to normal blorp
color clear instead of falling back to meta. With this change,
brw_blorp_clear_color can never fail.

Signed-off-by: Ian Romanick <***@intel.com>
---
src/mesa/drivers/dri/i965/brw_blorp.c | 28 +++++++++++++---------------
src/mesa/drivers/dri/i965/brw_blorp.h | 2 +-
src/mesa/drivers/dri/i965/brw_clear.c | 19 ++++++++++---------
3 files changed, 24 insertions(+), 25 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index 24867e8..6a79984 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -725,7 +725,7 @@ irb_logical_mt_layer(struct intel_renderbuffer *irb)
return physical_to_logical_layer(irb->mt, irb->mt_layer);
}

-static bool
+static void
do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
struct gl_renderbuffer *rb, unsigned buf,
bool partial_clear, bool encode_srgb)
@@ -750,7 +750,7 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,

/* If the clear region is empty, just return. */
if (x0 == x1 || y0 == y1)
- return true;
+ return;

bool can_fast_clear = !partial_clear;

@@ -782,14 +782,16 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
if (!irb->mt->mcs_buf) {
assert(!intel_miptree_is_lossless_compressed(brw, irb->mt));
if (!intel_miptree_alloc_non_msrt_mcs(brw, irb->mt, false)) {
- /* MCS allocation failed--probably this will only happen in
- * out-of-memory conditions. But in any case, try to recover
- * by falling back to a non-blorp clear technique.
+ /* There are a few reasons in addition to out-of-memory, that can
+ * cause intel_miptree_alloc_non_msrt_mcs to fail. Try to recover
+ * by falling back to non-fast clear.
*/
- return false;
+ can_fast_clear = false;
}
}
+ }

+ if (can_fast_clear) {
const enum isl_aux_state aux_state =
intel_miptree_get_aux_state(irb->mt, irb->mt_level, logical_layer);
union isl_color_value clear_color =
@@ -802,7 +804,7 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
if (aux_state == ISL_AUX_STATE_CLEAR &&
memcmp(&irb->mt->fast_clear_color,
&clear_color, sizeof(clear_color)) == 0)
- return true;
+ return;

irb->mt->fast_clear_color = clear_color;

@@ -872,10 +874,10 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
blorp_batch_finish(&batch);
}

- return true;
+ return;
}

-bool
+void
brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
GLbitfield mask, bool partial_clear, bool encode_srgb)
{
@@ -894,15 +896,11 @@ brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
if (rb == NULL)
continue;

- if (!do_single_blorp_clear(brw, fb, rb, buf, partial_clear,
- encode_srgb)) {
- return false;
- }
-
+ do_single_blorp_clear(brw, fb, rb, buf, partial_clear, encode_srgb);
irb->need_downsample = true;
}

- return true;
+ return;
}

void
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index fd1b5cc..636c993 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -59,7 +59,7 @@ brw_blorp_copy_miptrees(struct brw_context *brw,
unsigned dst_x, unsigned dst_y,
unsigned src_width, unsigned src_height);

-bool
+void
brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
GLbitfield mask, bool partial_clear, bool encode_srgb);

diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c
index 809e279..77c0dc4 100644
--- a/src/mesa/drivers/dri/i965/brw_clear.c
+++ b/src/mesa/drivers/dri/i965/brw_clear.c
@@ -228,16 +228,14 @@ brw_clear(struct gl_context *ctx, GLbitfield mask)
}

if (mask & BUFFER_BITS_COLOR) {
- const bool encode_srgb = ctx->Color.sRGBEnabled;
- if (brw_blorp_clear_color(brw, fb, mask, partial_clear, encode_srgb)) {
- debug_mask("blorp color", mask & BUFFER_BITS_COLOR);
- mask &= ~BUFFER_BITS_COLOR;
- }
+ brw_blorp_clear_color(brw, fb, mask, partial_clear,
+ ctx->Color.sRGBEnabled);
+ debug_mask("blorp color", mask & BUFFER_BITS_COLOR);
+ mask &= ~BUFFER_BITS_COLOR;
}

- GLbitfield tri_mask = mask & (BUFFER_BITS_COLOR |
- BUFFER_BIT_STENCIL |
- BUFFER_BIT_DEPTH);
+ GLbitfield tri_mask = mask & (BUFFER_BIT_STENCIL |
+ BUFFER_BIT_DEPTH);

if (tri_mask) {
debug_mask("tri", tri_mask);
@@ -250,7 +248,10 @@ brw_clear(struct gl_context *ctx, GLbitfield mask)
}
}

- /* Any strange buffers get passed off to swrast */
+ /* Any strange buffers get passed off to swrast. The only thing that
+ * should be left at this point is the accumulation buffer.
+ */
+ assert((mask & ~BUFFER_BIT_ACCUM) == 0);
if (mask) {
debug_mask("swrast", mask);
_swrast_Clear(ctx, mask);
--
2.9.4
Jason Ekstrand
2017-06-16 23:02:29 UTC
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Post by Ian Romanick
When intel_miptree_alloc_non_msrt_mcs fails, fall back to normal blorp
color clear instead of falling back to meta. With this change,
brw_blorp_clear_color can never fail.
---
src/mesa/drivers/dri/i965/brw_blorp.c | 28 +++++++++++++---------------
src/mesa/drivers/dri/i965/brw_blorp.h | 2 +-
src/mesa/drivers/dri/i965/brw_clear.c | 19 ++++++++++---------
3 files changed, 24 insertions(+), 25 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
b/src/mesa/drivers/dri/i965/brw_blorp.c
index 24867e8..6a79984 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -725,7 +725,7 @@ irb_logical_mt_layer(struct intel_renderbuffer *irb)
return physical_to_logical_layer(irb->mt, irb->mt_layer);
}
-static bool
+static void
do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
struct gl_renderbuffer *rb, unsigned buf,
bool partial_clear, bool encode_srgb)
@@ -750,7 +750,7 @@ do_single_blorp_clear(struct brw_context *brw, struct
gl_framebuffer *fb,
/* If the clear region is empty, just return. */
if (x0 == x1 || y0 == y1)
- return true;
+ return;
bool can_fast_clear = !partial_clear;
@@ -782,14 +782,16 @@ do_single_blorp_clear(struct brw_context *brw,
struct gl_framebuffer *fb,
if (!irb->mt->mcs_buf) {
You might as well roll this check into the one above it and drop a level of
nesting.

Other than that, this looks great. Thanks!
Post by Ian Romanick
assert(!intel_miptree_is_lossless_compressed(brw, irb->mt));
if (!intel_miptree_alloc_non_msrt_mcs(brw, irb->mt, false)) {
- /* MCS allocation failed--probably this will only happen in
- * out-of-memory conditions. But in any case, try to recover
- * by falling back to a non-blorp clear technique.
+ /* There are a few reasons in addition to out-of-memory, that can
+ * cause intel_miptree_alloc_non_msrt_mcs to fail. Try to recover
+ * by falling back to non-fast clear.
*/
- return false;
+ can_fast_clear = false;
}
}
+ }
+ if (can_fast_clear) {
const enum isl_aux_state aux_state =
intel_miptree_get_aux_state(irb->mt, irb->mt_level,
logical_layer);
union isl_color_value clear_color =
@@ -802,7 +804,7 @@ do_single_blorp_clear(struct brw_context *brw, struct
gl_framebuffer *fb,
if (aux_state == ISL_AUX_STATE_CLEAR &&
memcmp(&irb->mt->fast_clear_color,
&clear_color, sizeof(clear_color)) == 0)
- return true;
+ return;
irb->mt->fast_clear_color = clear_color;
@@ -872,10 +874,10 @@ do_single_blorp_clear(struct brw_context *brw,
struct gl_framebuffer *fb,
blorp_batch_finish(&batch);
}
- return true;
+ return;
}
-bool
+void
brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
GLbitfield mask, bool partial_clear, bool encode_srgb)
{
@@ -894,15 +896,11 @@ brw_blorp_clear_color(struct brw_context *brw,
struct gl_framebuffer *fb,
if (rb == NULL)
continue;
- if (!do_single_blorp_clear(brw, fb, rb, buf, partial_clear,
- encode_srgb)) {
- return false;
- }
-
+ do_single_blorp_clear(brw, fb, rb, buf, partial_clear, encode_srgb);
irb->need_downsample = true;
}
- return true;
+ return;
}
void
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h
b/src/mesa/drivers/dri/i965/brw_blorp.h
index fd1b5cc..636c993 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -59,7 +59,7 @@ brw_blorp_copy_miptrees(struct brw_context *brw,
unsigned dst_x, unsigned dst_y,
unsigned src_width, unsigned src_height);
-bool
+void
brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
GLbitfield mask, bool partial_clear, bool encode_srgb);
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c
b/src/mesa/drivers/dri/i965/brw_clear.c
index 809e279..77c0dc4 100644
--- a/src/mesa/drivers/dri/i965/brw_clear.c
+++ b/src/mesa/drivers/dri/i965/brw_clear.c
@@ -228,16 +228,14 @@ brw_clear(struct gl_context *ctx, GLbitfield mask)
}
if (mask & BUFFER_BITS_COLOR) {
- const bool encode_srgb = ctx->Color.sRGBEnabled;
- if (brw_blorp_clear_color(brw, fb, mask, partial_clear,
encode_srgb)) {
- debug_mask("blorp color", mask & BUFFER_BITS_COLOR);
- mask &= ~BUFFER_BITS_COLOR;
- }
+ brw_blorp_clear_color(brw, fb, mask, partial_clear,
+ ctx->Color.sRGBEnabled);
+ debug_mask("blorp color", mask & BUFFER_BITS_COLOR);
+ mask &= ~BUFFER_BITS_COLOR;
}
- GLbitfield tri_mask = mask & (BUFFER_BITS_COLOR |
- BUFFER_BIT_STENCIL |
- BUFFER_BIT_DEPTH);
+ GLbitfield tri_mask = mask & (BUFFER_BIT_STENCIL |
+ BUFFER_BIT_DEPTH);
if (tri_mask) {
debug_mask("tri", tri_mask);
@@ -250,7 +248,10 @@ brw_clear(struct gl_context *ctx, GLbitfield mask)
}
}
- /* Any strange buffers get passed off to swrast */
+ /* Any strange buffers get passed off to swrast. The only thing that
+ * should be left at this point is the accumulation buffer.
+ */
+ assert((mask & ~BUFFER_BIT_ACCUM) == 0);
if (mask) {
debug_mask("swrast", mask);
_swrast_Clear(ctx, mask);
--
2.9.4
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Ian Romanick
2017-06-16 21:01:53 UTC
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Raw Message
From: Jason Ekstrand <***@intel.com>

It's a bit rare, but blorp can trigger a urb reconfiguration. When that
happens, we need to re-upload the URB config. Fortunately, this isn't as
bad as it looks because gen7_upload_urb will not re-emit the packet if it
would end up being a no-op so this doesn't mean that running blorp always
triggers a URB reconfig.

v2 (idr): Sort BRW_NEW_ tokens to match brw_recalculate_urb_fence and
gen6_urb.
---
src/mesa/drivers/dri/i965/gen7_urb.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c b/src/mesa/drivers/dri/i965/gen7_urb.c
index 525c9c4..c4b479c 100644
--- a/src/mesa/drivers/dri/i965/gen7_urb.c
+++ b/src/mesa/drivers/dri/i965/gen7_urb.c
@@ -236,7 +236,8 @@ gen7_upload_urb(struct brw_context *brw, unsigned vs_size,
const struct brw_tracked_state gen7_urb = {
.dirty = {
.mesa = 0,
- .brw = BRW_NEW_CONTEXT |
+ .brw = BRW_NEW_BLORP |
+ BRW_NEW_CONTEXT |
BRW_NEW_URB_SIZE |
BRW_NEW_GS_PROG_DATA |
BRW_NEW_TCS_PROG_DATA |
--
2.9.4
Jason Ekstrand
2017-06-16 22:53:18 UTC
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Permalink
Raw Message
Technically, this isn't actually a problem because blorp manually whacks
BRW_NEW_URB_SIZE. That said, triggering on NEW_BLORP is a better plan
anyway. With this patch, we can probably remove the line from blorp where
it sets NEW_URB_SIZE.
Post by Ian Romanick
It's a bit rare, but blorp can trigger a urb reconfiguration. When that
happens, we need to re-upload the URB config. Fortunately, this isn't as
bad as it looks because gen7_upload_urb will not re-emit the packet if it
would end up being a no-op so this doesn't mean that running blorp always
triggers a URB reconfig.
v2 (idr): Sort BRW_NEW_ tokens to match brw_recalculate_urb_fence and
gen6_urb.
---
src/mesa/drivers/dri/i965/gen7_urb.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c
b/src/mesa/drivers/dri/i965/gen7_urb.c
index 525c9c4..c4b479c 100644
--- a/src/mesa/drivers/dri/i965/gen7_urb.c
+++ b/src/mesa/drivers/dri/i965/gen7_urb.c
@@ -236,7 +236,8 @@ gen7_upload_urb(struct brw_context *brw, unsigned vs_size,
const struct brw_tracked_state gen7_urb = {
.dirty = {
.mesa = 0,
- .brw = BRW_NEW_CONTEXT |
+ .brw = BRW_NEW_BLORP |
+ BRW_NEW_CONTEXT |
BRW_NEW_URB_SIZE |
BRW_NEW_GS_PROG_DATA |
BRW_NEW_TCS_PROG_DATA |
--
2.9.4
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Ian Romanick
2017-06-16 21:01:55 UTC
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Raw Message
From: Ian Romanick <***@intel.com>

Otherwise the values used for coordinate normalization use the wrong
sizes.

Signed-off-by: Ian Romanick <***@intel.com>
Suggested-by: Jason Ekstrand <***@intel.com>
---
src/intel/blorp/blorp_blit.c | 20 +++++++++++---------
1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index e48e5da..317a2f3 100644
--- a/src/intel/blorp/blorp_blit.c
+++ b/src/intel/blorp/blorp_blit.c
@@ -1822,6 +1822,17 @@ try_blorp_blit(struct blorp_batch *batch,

params->num_samples = params->dst.surf.samples;

+ if (wm_prog_key->bilinear_filter && batch->blorp->isl_dev->info->gen < 6) {
+ /* Gen4-5 don't support non-normalized texture coordinates */
+ wm_prog_key->src_coords_normalized = true;
+ params->wm_inputs.src_inv_size[0] =
+ 1.0f / minify(params->src.surf.logical_level0_px.width,
+ params->src.view.base_level);
+ params->wm_inputs.src_inv_size[1] =
+ 1.0f / minify(params->src.surf.logical_level0_px.height,
+ params->src.view.base_level);
+ }
+
if (params->src.tile_x_sa || params->src.tile_y_sa) {
assert(wm_prog_key->need_src_offset);
surf_get_intratile_offset_px(&params->src,
@@ -2085,15 +2096,6 @@ blorp_blit(struct blorp_batch *batch,
if (filter == GL_LINEAR &&
params.src.surf.samples <= 1 && params.dst.surf.samples <= 1) {
wm_prog_key.bilinear_filter = true;
-
- if (batch->blorp->isl_dev->info->gen < 6) {
- /* Gen4-5 don't support non-normalized texture coordinates */
- wm_prog_key.src_coords_normalized = true;
- params.wm_inputs.src_inv_size[0] =
- 1.0f / minify(params.src.surf.logical_level0_px.width, src_level);
- params.wm_inputs.src_inv_size[1] =
- 1.0f / minify(params.src.surf.logical_level0_px.height, src_level);
- }
}

if ((params.src.surf.usage & ISL_SURF_USAGE_DEPTH_BIT) == 0 &&
--
2.9.4
Jason Ekstrand
2017-06-16 22:58:20 UTC
Reply
Permalink
Raw Message
Post by Ian Romanick
Otherwise the values used for coordinate normalization use the wrong
sizes.
---
src/intel/blorp/blorp_blit.c | 20 +++++++++++---------
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index e48e5da..317a2f3 100644
--- a/src/intel/blorp/blorp_blit.c
+++ b/src/intel/blorp/blorp_blit.c
@@ -1822,6 +1822,17 @@ try_blorp_blit(struct blorp_batch *batch,
params->num_samples = params->dst.surf.samples;
+ if (wm_prog_key->bilinear_filter && batch->blorp->isl_dev->info->gen < 6) {
+ /* Gen4-5 don't support non-normalized texture coordinates */
+ wm_prog_key->src_coords_normalized = true;
+ params->wm_inputs.src_inv_size[0] =
+ 1.0f / minify(params->src.surf.logical_level0_px.width,
+ params->src.view.base_level);
+ params->wm_inputs.src_inv_size[1] =
+ 1.0f / minify(params->src.surf.logical_level0_px.height,
+ params->src.view.base_level);
+ }
+
if (params->src.tile_x_sa || params->src.tile_y_sa) {
assert(wm_prog_key->need_src_offset);
surf_get_intratile_offset_px(&params->src,
@@ -2085,15 +2096,6 @@ blorp_blit(struct blorp_batch *batch,
if (filter == GL_LINEAR &&
params.src.surf.samples <= 1 && params.dst.surf.samples <= 1) {
wm_prog_key.bilinear_filter = true;
-
- if (batch->blorp->isl_dev->info->gen < 6) {
- /* Gen4-5 don't support non-normalized texture coordinates */
- wm_prog_key.src_coords_normalized = true;
- params.wm_inputs.src_inv_size[0] =
- 1.0f / minify(params.src.surf.logical_level0_px.width, src_level);
- params.wm_inputs.src_inv_size[1] =
- 1.0f / minify(params.src.surf.logical_level0_px.height, src_level);
- }
}
if ((params.src.surf.usage & ISL_SURF_USAGE_DEPTH_BIT) == 0 &&
--
2.9.4
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Jason Ekstrand
2017-06-16 22:53:42 UTC
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There is no intel_miptree_slice_has_hiz function, but there is a
intel_miptree_level_has_hiz function. I assume that's the correct one
to use.
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index f7b8e67..e672f50 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -571,7 +571,7 @@ struct intel_mipmap_tree
* To allocate the hiz buffer, use intel_miptree_alloc_hiz().
*
* To determine if hiz is enabled, do not check this pointer. Instead,
use
- * intel_miptree_slice_has_hiz().
+ * intel_miptree_level_has_hiz().
*/
struct intel_miptree_hiz_buffer *hiz_buf;
--
2.9.4
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Jason Ekstrand
2017-06-16 22:56:38 UTC
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drivers/common/meta.c:2694:71: warning: unused parameter ‘dims’
[-Wunused-parameter]
copytexsubimage_using_blit_framebuffer(struct gl_context *ctx, GLuint dims,
^~~~
---
src/mesa/drivers/common/meta.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/
meta.c
index 1ff4651..39499c7 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -2770,7 +2770,7 @@ get_temp_image_type(struct gl_context *ctx, mesa_format format)
* glBlitFramebuffer() to implement glCopyTexSubImage().
*/
static bool
-copytexsubimage_using_blit_framebuffer(struct gl_context *ctx, GLuint dims,
+copytexsubimage_using_blit_framebuffer(struct gl_context *ctx,
struct gl_texture_image *texImage,
GLint xoffset,
GLint yoffset,
@@ -2864,7 +2864,7 @@ _mesa_meta_CopyTexSubImage(struct gl_context *ctx, GLuint dims,
GLint bpp;
void *buf;
- if (copytexsubimage_using_blit_framebuffer(ctx, dims,
+ if (copytexsubimage_using_blit_framebuffer(ctx,
texImage,
xoffset, yoffset, zoffset,
rb,
--
2.9.4
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